Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44917 )
Change subject: soc/intel/tigerlake: Enable and use USB4 PCIe driver ......................................................................
Patch Set 16:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44917/3/src/soc/intel/tigerlake/chi... File src/soc/intel/tigerlake/chipset.cb:
https://review.coreboot.org/c/coreboot/+/44917/3/src/soc/intel/tigerlake/chi... PS3, Line 8: chip drivers/intel/usb4/pcie : register "port_id" = "0" : use tbt_dma0 as usb4_port : device pci 07.0 alias tbt_pcie_rp0 off end : end
Done
Sorry I was sidetracked with some non-work stuff yesterday and still trying to get a useful work area set up at my new/temp home so I didn't get a chance to look deeper at this.
It looks like with this as generic we get some unhappy output at boot:
PCI: 00:07.0 scanning... do_pci_scan_bridge for PCI: 00:07.0 PCI: pci_scan_bus for bus 01 child GENERIC: 0.0 not a PCI device (repeated a couple dozen times) PCI: Leftover static devices: GENERIC: 0.0 PCI: Check your devicetree.cb.
And we don't get the devices generated in the SSDT. I will dig into it more as I have a TBT dock coming to test with.
In the end for volteer it doesn't matter too much if the pci bridges behind a TBT device actually get scanned and set up since we don't want external PCI enumerated in the firmware anyway, we just need the ACPI tables and leave the rest to the OS for now.