build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31368 )
Change subject: soc/intel/skylake: Avoid TOL_1V8 being set for GPP_F4 ~ GPP_F11 ......................................................................
Patch Set 5:
(2 comments)
https://review.coreboot.org/#/c/31368/5/src/soc/intel/common/block/gpio/gpio... File src/soc/intel/common/block/gpio/gpio.c:
https://review.coreboot.org/#/c/31368/5/src/soc/intel/common/block/gpio/gpio... PS5, Line 280: * ~ GPP_F11. code indent should use tabs where possible
https://review.coreboot.org/#/c/31368/5/src/soc/intel/common/block/gpio/gpio... PS5, Line 282: if (cfg->pad >= GPP_F4 && cfg->pad <= GPP_F11 && suspect code indent for conditional statements (16, 23)