[coreboot-gerrit] [S] Change in coreboot[master]: bd82x6x/early_pch: enable smbus in bootblock stage

[Ahamed Husni (Code Review)]

Ahamed Husni has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/67340 )

Change subject: bd82x6x/early_pch: enable smbus in bootblock stage
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bd82x6x/early_pch: enable smbus in bootblock stage

Change-Id: I97d0afb013ede428383acaa0aa97ab04fe80e2a4
Signed-off-by: Husni Faiz 
---
M src/southbridge/intel/bd82x6x/early_pch.c
M src/southbridge/intel/common/Makefile.inc
2 files changed, 16 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/67340/1

diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c
index bbbc5e6..5d31fef 100644
--- a/src/southbridge/intel/bd82x6x/early_pch.c
+++ b/src/southbridge/intel/bd82x6x/early_pch.c
@@ -310,6 +310,10 @@

setup_pch_gpios(&mainboard_gpio_map);

+#if CONFIG(CONSOLE_I2C_SMBUS)
+	if (ENV_RAMINIT || ENV_INITIAL_STAGE)
+#else
    if (ENV_RAMINIT)
+#endif /* CONFIG_CONSOLE_I2C_SMBUS */
    	enable_smbus();
 }
diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc
index 1fc3a63..fd1d319 100644
--- a/src/southbridge/intel/common/Makefile.inc
+++ b/src/southbridge/intel/common/Makefile.inc
@@ -9,8 +9,10 @@

all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME) += me.c

+bootblock-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS) += early_smbus.c
 romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS) += early_smbus.c

+bootblock-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus.c
 romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus.c
 ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus.c
 ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus_ops.c