[coreboot-gerrit] Change in coreboot[master]: soc/intel/alderlake: Enable Irms UPD for ADL

[Ronak Kanabar (Code Review)]

Attention is currently required from: V Sowmya, Maulik V Vaghela, Tim Wawrzynczak, Subrata Banik, Sridhar Siricilla, Vinay Kumar, Balaji Manigandan, Kane Chen, Ronak Kanabar, Srinidhi N Kaushik, Patrick Rudolph.
Hello V Sowmya, build bot (Jenkins), Maulik V Vaghela, Tim Wawrzynczak, Vinay Kumar, Subrata Banik, Sridhar Siricilla, Balaji Manigandan, Kane Chen, Srinidhi N Kaushik, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/56330

to look at the new patch set (#11).

Change subject: soc/intel/alderlake: Enable Irms UPD for ADL
......................................................................

soc/intel/alderlake: Enable Irms UPD for ADL

This change sets Irms config in FSP. It results VR TDC Input current to
be treated as it is root mean square.

BRANCH=None
TEST=Build and boot brya with debug FSP and verify Irms UPD value
from logs

Change-Id: Ice5c775ef9560503109957a1ed994af1d287aafc
Signed-off-by: Ronak Kanabar 
---
M src/soc/intel/alderlake/fsp_params.c
1 file changed, 3 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/56330/11