[coreboot-gerrit] Change in coreboot[master]: src/soc/intel/braswell/northcluster.c: Typo fix

[Frans Hendriks (Code Review)]

Frans Hendriks has uploaded this change for review. ( https://review.coreboot.org/29321

Change subject: src/soc/intel/braswell/northcluster.c: Typo fix
......................................................................

src/soc/intel/braswell/northcluster.c: Typo fix

Correct typo in comment and debug string.

BUG=N/A
TEST=build

Change-Id: I0362bb8d7c883e7fcbc6a2fc2f9918251f0d8d6e
Signed-off-by: Frans Hendriks 
---
M src/security/tpm/tss.h
M src/security/tpm/tss/tcg-2.0/tss_marshaling.c
M src/soc/intel/braswell/include/soc/irq.h
M src/soc/intel/braswell/northcluster.c
M util/cbfstool/cbfstool.c
5 files changed, 6 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/29321/1

diff --git a/src/security/tpm/tss.h b/src/security/tpm/tss.h
index c053df9..2259e79 100644
--- a/src/security/tpm/tss.h
+++ b/src/security/tpm/tss.h
@@ -137,7 +137,7 @@
 uint32_t tlcl_physical_presence_cmd_enable(void);

/**
- * Finalize the physical presence settings: sofware PP is enabled, hardware PP
+ * Finalize the physical presence settings: software PP is enabled, hardware PP
  * is disabled, and the lifetime lock is set.  The TPM error code is returned.
  */
 uint32_t tlcl_finalize_physical_presence(void);
diff --git a/src/security/tpm/tss/tcg-2.0/tss_marshaling.c b/src/security/tpm/tss/tcg-2.0/tss_marshaling.c
index ad23d9b..168eac9 100644
--- a/src/security/tpm/tss/tcg-2.0/tss_marshaling.c
+++ b/src/security/tpm/tss/tcg-2.0/tss_marshaling.c
@@ -439,12 +439,12 @@
    }

/*
-	 * Let's ignore the authorisation section. It should be 5 bytes total,
+	 * Let's ignore the authorization section. It should be 5 bytes total,
     * just confirm that this is the case and report any discrepancy.
     */
    if (ibuf_remaining(ib) != 5)
    	printk(BIOS_ERR,
-		       "%s:%d - unexpected authorisation seciton size %zd\n",
+		       "%s:%d - unexpected authorization section size %zd\n",
    	       __func__, __LINE__, ibuf_remaining(ib));

ibuf_oob_drain(ib, ibuf_remaining(ib));
diff --git a/src/soc/intel/braswell/include/soc/irq.h b/src/soc/intel/braswell/include/soc/irq.h
index 4375c20..98b9e56 100644
--- a/src/soc/intel/braswell/include/soc/irq.h
+++ b/src/soc/intel/braswell/include/soc/irq.h
@@ -177,7 +177,7 @@
 # define SCIS_IRQ23				0x07

/*
- * In each mainbaord directory there should exist a header file irqroute.h that
+ * In each mainboard directory there should exist a header file irqroute.h that
  * defines the PCI_DEV_PIRQ_ROUTES and PIRQ_PIC_ROUTES macros which
  * consist of PCI_DEV_PIRQ_ROUTE and PIRQ_PIC entries.
  */
diff --git a/src/soc/intel/braswell/northcluster.c b/src/soc/intel/braswell/northcluster.c
index 3245a28..ee43c89 100644
--- a/src/soc/intel/braswell/northcluster.c
+++ b/src/soc/intel/braswell/northcluster.c
@@ -53,7 +53,7 @@
  * +--------------------------+ 0
  *
  * Note that there are really only a few regions that need to enumerated w.r.t.
- * coreboot's resrouce model:
+ * coreboot's resource model:
  *
  * +--------------------------+ BMBOUND_HI
  * |     Cacheable/Usable     |
diff --git a/util/cbfstool/cbfstool.c b/util/cbfstool/cbfstool.c
index 28e0e5d..ceda785 100644
--- a/util/cbfstool/cbfstool.c
+++ b/util/cbfstool/cbfstool.c
@@ -134,7 +134,7 @@
  * "top-aligned" offsets from the top of the image region. Works in either
  * direction: pass in one type of offset and receive the other type.
  * N.B. A top-aligned offset is always a positive number, and should not be
- * confused with a top-aliged *address*, which is its arithmetic inverse. */
+ * confused with a top-aligned *address*, which is its arithmetic inverse. */
 static unsigned convert_to_from_top_aligned(const struct buffer *region,
    							unsigned offset)
 {