Frans Hendriks has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33433
Change subject: mainboard/facebook/fbg1701: Configure TC358860 eDP to MIPI controller ......................................................................
mainboard/facebook/fbg1701: Configure TC358860 eDP to MIPI controller
FBG1701 contains a TC358860 eDP to MIPI Bridge controller which needs to be configured. Add mainboard_configure_edp_bridge() to program the controller. CPLD version is used to determine which table must be programmed.
The eDP is an i2c slave which expects the next i2c bus data for block write: <Slave Addr> <Reg Addr [15:8]> <Reg Addr[7:0]> < Data[7:0]> [Data[15:8], Data[23:16], Data{31:24]
BUG=N/A TEST=Config eDP and verify that LCD panels are working on Facebook FBG-1701 rev 0-2
Change-Id: I262cb4376b86db94e3bb9522c556b5cc3ff38335 Signed-off-by: Frans Hendriks fhendriks@eltan.com --- M src/mainboard/facebook/fbg1701/mainboard.c M src/mainboard/facebook/fbg1701/mainboard.h M src/mainboard/facebook/fbg1701/ramstage.c 3 files changed, 328 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/33433/1
diff --git a/src/mainboard/facebook/fbg1701/mainboard.c b/src/mainboard/facebook/fbg1701/mainboard.c index ff2564d..40054d8 100644 --- a/src/mainboard/facebook/fbg1701/mainboard.c +++ b/src/mainboard/facebook/fbg1701/mainboard.c @@ -16,10 +16,34 @@ * GNU General Public License for more details. */
+#include <arch/io.h> #include <device/device.h> +#include <soc/smbus.h> #include "onboard.h" #include "mainboard.h"
+void mainboard_configure_edp_bridge(void) +{ + edp_data_t *edptable; + + if (((inb(CPLD_PCB_VERSION_PORT) & CPLD_PCB_VERSION_MASK) >> + CPLD_PCB_VERSION_BIT) < 7) + edptable = (edp_data_t *)mainboard_TC348860_InitTable; + else + edptable = (edp_data_t *)mainboard_B101UAN08_InitTable; + + /* reset bridge */ + outb(CPLD_CMD_RESET_DSI_BRIDGE_ACTIVE, CPLD_RESET_PORT); + outb(CPLD_CMD_RESET_DSI_BRIDGE_INACTIVE, CPLD_RESET_PORT); + + /* set eDP bridge to eDP 1920 */ + while (edptable->address) { + smbus_i2c_block_write(edptable->address, edptable->offset, + edptable->number_of_databytes, &edptable->data[0]); + edptable++; + }; +} + /* * Declare the resources we are using */ diff --git a/src/mainboard/facebook/fbg1701/mainboard.h b/src/mainboard/facebook/fbg1701/mainboard.h index e161da0..870b02e 100644 --- a/src/mainboard/facebook/fbg1701/mainboard.h +++ b/src/mainboard/facebook/fbg1701/mainboard.h @@ -1,7 +1,8 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2018 Eltan B.V. + * Copyright (C) 2018-2019 Facebook, Inc + * Copyright (C) 2018-2019 Eltan B.V. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -16,6 +17,305 @@ #ifndef MAINBOARD_H #define MAINBOARD_H
+typedef struct { + u8 number_of_databytes; + u8 address; + u8 offset; /* register address [15:8] */ + u8 data[5]; /* First byte is register address [7:0] */ +} edp_data_t; + +static const edp_data_t mainboard_TC348860_InitTable[] = { + /* set eDP bridge to eDP 1920 */ + /* IO */ + { 5, 0x68, 0x08, {0x00, 0x01, 0x00, 0x00, 0x00 } }, + /* Boot */ + { 5, 0x68, 0x10, {0x00, 0x78, 0x69, 0x00, 0x00 } }, + { 5, 0x68, 0x10, {0x04, 0x02, 0x08, 0x02, 0x00 } }, + { 5, 0x68, 0x10, {0x08, 0x23, 0x00, 0x87, 0x02 } }, + { 5, 0x68, 0x10, {0x0C, 0x19, 0x04, 0x00, 0x23 } }, + { 5, 0x68, 0x10, {0x10, 0x06, 0x00, 0x67, 0x00 } }, + { 5, 0x68, 0x10, {0x14, 0x01, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x10, {0x18, 0xFF, 0xFF, 0xFF, 0xFF } }, + /* Internal */ + { 2, 0x68, 0xB0, {0x05, 0x0A, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB0, {0x06, 0x03, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB0, {0x07, 0x16, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB0, {0x08, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB0, {0x09, 0x21, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB0, {0x0A, 0x07, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x10, {0x14, 0x03, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x10, {0x18, 0xFF, 0xFF, 0xFF, 0xFF } }, + /* eDP */ + { 2, 0x68, 0x80, {0x03, 0x41, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB4, {0x00, 0x0D, 0x00, 0x00, 0x00 } }, + /* DPRX */ + { 2, 0x68, 0xB8, {0x8E, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x8F, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x9A, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x9B, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x00, 0x0E, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x26, 0x02, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x01, 0x20, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC0, 0xF1, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC1, 0xF1, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC2, 0xF0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC3, 0xF0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC4, 0xF0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC5, 0xF0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC6, 0xF0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC7, 0xF0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x0B, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x33, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x5B, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x10, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x38, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x60, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x15, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x3D, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x65, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x1A, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x42, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x6A, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x1F, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x47, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x6F, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x24, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x4C, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x74, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x29, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x51, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x79, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x2E, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x56, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x7E, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x90, 0x10, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x91, 0x0F, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x92, 0xF6, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x93, 0x10, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x94, 0x0F, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x95, 0xF6, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x96, 0x10, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x97, 0x0F, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x98, 0xF6, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x99, 0x10, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x9A, 0x0F, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x9B, 0xF6, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x8A, 0x03, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x96, 0x03, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0xD1, 0x07, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0xB0, 0x07, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x8B, 0x04, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x8C, 0x45, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x8D, 0x05, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x97, 0x04, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x98, 0xE0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x99, 0x2E, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0x80, {0x0E, 0x00, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x10, {0x14, 0x07, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x10, {0x18, 0xFF, 0xFF, 0xFF, 0xFF } }, + /* Video size */ + { 5, 0x68, 0x01, {0x48, 0xB0, 0x04, 0x00, 0x00 } }, + { 5, 0x68, 0x29, {0x20, 0x10, 0x0E, 0x0B, 0x3E } }, + /* eDP */ + { 2, 0x68, 0xB6, {0x31, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0x80, {0x01, 0x14, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0x80, {0x02, 0x02, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB6, {0x08, 0x0B, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x00, 0x1E, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0x87, {0x00, 0x00, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x50, {0x10, 0x00, 0x00, 0x9D, 0x00 } }, + { 5, 0x68, 0x00, {0x8C, 0x40, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x00, {0x80, 0x02, 0x00, 0x00, 0x00 } }, + /* Link Training */ + { 2, 0x68, 0x82, {0x02, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0x82, {0x03, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0x82, {0x04, 0xFF, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x21, {0x58, 0x09, 0x00, 0x28, 0x00 } }, + { 5, 0x68, 0x21, {0x60, 0x07, 0x00, 0x0F, 0x00 } }, + { 5, 0x68, 0x21, {0x64, 0x28, 0x23, 0x00, 0x00 } }, + { 5, 0x68, 0x21, {0x68, 0x0E, 0x00, 0x00, 0x00 } }, + /* DSI */ + { 5, 0x68, 0x20, {0x7C, 0x81, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x20, {0x50, 0x00, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x20, {0x1C, 0x01, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x20, {0x60, 0xFF, 0xFF, 0xFF, 0xFF } }, + /* GPIO */ + { 5, 0x68, 0x08, {0x04, 0x00, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x00, {0x80, 0x0F, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x00, {0x84, 0x0F, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x00, {0x84, 0x00, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x00, {0x84, 0x0F, 0x00, 0x00, 0x00 } }, + /* DSI clock */ + { 5, 0x68, 0x20, {0x50, 0x20, 0x00, 0x00, 0x00 } }, + /* LCD init */ + { 5, 0x68, 0x22, {0xFC, 0x15, 0x01, 0x00, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0x8C, 0x80, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0xC7, 0x50, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0xC5, 0x50, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0x85, 0x04, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0x86, 0x08, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0x83, 0xAA, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0x84, 0x11, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0x9C, 0x10, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0xA9, 0x4B, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x05, 0x11, 0x00, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x05, 0x29, 0x00, 0x81 } }, + { 5, 0x68, 0x2A, {0x10, 0x10, 0x00, 0x04, 0x80 } }, + { 5, 0x68, 0x2A, {0x04, 0x01, 0x00, 0x00, 0x00 } }, + /* Check Video */ + { 5, 0x68, 0x01, {0x54, 0x01, 0x00, 0x00, 0x00 } }, + { 5, 0x00, 0x00, {0x00, 0x00, 0x00, 0x00, 0x00 } }, +}; + +static const edp_data_t mainboard_B101UAN08_InitTable[] = { + /* set eDP bridge to eDP 1920 */ + /* IO Voltage Setting */ + { 5, 0x68, 0x08, {0x00, 0x01, 0x00, 0x00, 0x00 } }, + /* Boot Settings */ + { 5, 0x68, 0x10, {0x00, 0x78, 0x69, 0x00, 0x00 } }, + { 5, 0x68, 0x10, {0x04, 0x02, 0x08, 0x02, 0x00 } }, + { 5, 0x68, 0x10, {0x08, 0x22, 0x00, 0xA0, 0x02 } }, + { 5, 0x68, 0x10, {0x0C, 0x50, 0x04, 0x00, 0x03 } }, + { 5, 0x68, 0x10, {0x10, 0x10, 0x0D, 0x06, 0x01 } }, + { 5, 0x68, 0x10, {0x14, 0x01, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x10, {0x18, 0xFF, 0xFF, 0xFF, 0xFF } }, + /* Internal PCLK settings for Non Present or REFCLK=26MHz */ + { 2, 0x68, 0xB0, {0x05, 0x0A, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB0, {0x06, 0x03, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB0, {0x07, 0x16, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB0, {0x08, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB0, {0x09, 0x21, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB0, {0x0A, 0x07, 0x00, 0x00, 0x00 } }, + /* DSI Clock setting for Non Preset or REFCLK=26MHz */ + { 5, 0x68, 0x41, {0xB0, 0xC1, 0x22, 0x04, 0x00 } }, + { 5, 0x68, 0x41, {0xBC, 0x01, 0x0E, 0x00, 0x00 } }, + { 5, 0x68, 0x41, {0xC0, 0x30, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x10, {0x14, 0x03, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x10, {0x18, 0xFF, 0xFF, 0xFF, 0xFF } }, + /* Additional Settng for eDP */ + { 2, 0x68, 0x80, {0x03, 0x41, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB4, {0x00, 0x0D, 0x00, 0x00, 0x00 } }, + /* DPRX CAD Register Setting */ + { 2, 0x68, 0xB8, {0x8E, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x8F, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x9A, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x9B, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x00, 0x0E, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x26, 0x02, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x01, 0x20, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC0, 0xF1, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC1, 0xF1, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC2, 0xF0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC3, 0xF0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC4, 0xF0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC5, 0xF0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC6, 0xF0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0xC7, 0xF0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x0B, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x33, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x5B, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x10, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x38, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x60, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x15, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x3D, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x65, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x1A, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x42, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x6A, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x1F, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x47, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x6F, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x24, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x4C, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x74, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x29, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x51, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x79, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x2E, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x56, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x7E, 0x00, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x90, 0x10, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x91, 0x0F, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x92, 0xF6, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x93, 0x10, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x94, 0x0F, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x95, 0xF6, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x96, 0x10, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x97, 0x0F, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x98, 0xF6, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x99, 0x10, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x9A, 0x0F, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0x9B, 0xF6, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x8A, 0x03, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x96, 0x03, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0xD1, 0x07, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xBB, {0xB0, 0x07, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x8B, 0x04, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x8C, 0x45, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x8D, 0x05, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x97, 0x04, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x98, 0xE0, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x99, 0x2E, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0x80, {0x0E, 0x00, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x10, {0x14, 0x07, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x10, {0x18, 0xFF, 0xFF, 0xFF, 0xFF } }, + /* Video size Related Settings for Non Present */ + { 5, 0x68, 0x01, {0x48, 0xB0, 0x04, 0x00, 0x00 } }, + { 5, 0x68, 0x29, {0x20, 0x10, 0x0E, 0x0B, 0x3E } }, + /* eDP Settings for Link Training*/ + { 2, 0x68, 0xB6, {0x31, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0x80, {0x01, 0x14, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0x80, {0x02, 0x02, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB6, {0x08, 0x0B, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0xB8, {0x00, 0x1E, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0x87, {0x00, 0x00, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x50, {0x10, 0x00, 0x00, 0x9D, 0x00 } }, + { 5, 0x68, 0x00, {0x8C, 0x40, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x00, {0x80, 0x02, 0x00, 0x00, 0x00 } }, + /* Link Training */ + { 2, 0x68, 0x82, {0x02, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0x82, {0x03, 0xFF, 0x00, 0x00, 0x00 } }, + { 2, 0x68, 0x82, {0x04, 0xFF, 0x00, 0x00, 0x00 } }, + /* DSI Transition Time Setting for Non Preset */ + { 5, 0x68, 0x21, {0x54, 0x0D, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x21, {0x58, 0x06, 0x00, 0x2A, 0x00 } }, + { 5, 0x68, 0x21, {0x5C, 0x07, 0x00, 0x0E, 0x00 } }, + { 5, 0x68, 0x21, {0x60, 0x07, 0x00, 0x10, 0x00 } }, + { 5, 0x68, 0x21, {0x64, 0x10, 0x27, 0x00, 0x00 } }, + { 5, 0x68, 0x21, {0x68, 0x0E, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x21, {0x6C, 0x0A, 0x00, 0x0E, 0x00 } }, + { 5, 0x68, 0x21, {0x78, 0x0E, 0x00, 0x0D, 0x00 } }, + /* DSI Start */ + { 5, 0x68, 0x20, {0x7C, 0x81, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x20, {0x50, 0x00, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x20, {0x1C, 0x01, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x20, {0x60, 0xFF, 0xFF, 0xFF, 0xFF } }, + /* GPIO for LCD control*/ + { 5, 0x68, 0x08, {0x04, 0x00, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x00, {0x80, 0x0F, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x00, {0x84, 0x0F, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x00, {0x84, 0x00, 0x00, 0x00, 0x00 } }, + { 5, 0x68, 0x00, {0x84, 0x0F, 0x00, 0x00, 0x00 } }, + /* DSI Hs Clock Mode */ + { 5, 0x68, 0x20, {0x50, 0x20, 0x00, 0x00, 0x00 } }, + /* LCD Initialization */ + { 5, 0x68, 0x22, {0xFC, 0x15, 0xBF, 0xA5, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0x01, 0x00, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0x8F, 0xA5, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0x83, 0xAA, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0x84, 0x11, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0xA9, 0x48, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0x83, 0x00, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0x84, 0x00, 0x81 } }, + { 5, 0x68, 0x22, {0xFC, 0x15, 0x8F, 0x00, 0x81 } }, + { 5, 0x68, 0x2A, {0x10, 0x10, 0x00, 0x04, 0x80 } }, + { 5, 0x68, 0x2A, {0x04, 0x01, 0x00, 0x00, 0x00 } }, + /* Check if eDP video is coming */ + { 5, 0x68, 0x01, {0x54, 0x01, 0x00, 0x00, 0x00 } }, +}; + +void mainboard_configure_edp_bridge(void); void *load_logo(size_t *logo_size);
#endif diff --git a/src/mainboard/facebook/fbg1701/ramstage.c b/src/mainboard/facebook/fbg1701/ramstage.c index 91dfe3b..b600361 100644 --- a/src/mainboard/facebook/fbg1701/ramstage.c +++ b/src/mainboard/facebook/fbg1701/ramstage.c @@ -18,6 +18,9 @@
void mainboard_silicon_init_params(SILICON_INIT_UPD *params) { + /* Configure the eDP bridge to eDP 1920 */ + mainboard_configure_edp_bridge(); + if (CONFIG(FSP1_1_DISPLAY_LOGO)) { size_t logo_len; void *logo = NULL;