[coreboot-gerrit] Change in coreboot[master]: device/dram: Add addtional LPDDR4 speed grades

[Felix Held (Code Review)]

Attention is currently required from: Raul Rangel, Nikolai Vyssotski, Rob Barnes, Julian Schroeder.
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57294 )

Change subject: device/dram: Add addtional LPDDR4 speed grades
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Patch Set 2:

(2 comments)

File src/device/dram/lpddr4.c:

https://review.coreboot.org/c/coreboot/+/57294/comment/f4a969cc_f562ca11 
PS1, Line 51: 934
> Could go either way. JEDEC Standard No. 79-4C / Table 169 says DDR4-1866 tck(avg) min = 1.071ns. […]

ok, since the nominal value should be within the range specified by min_clock_mhz  and max_clock_mhz, we should probably go with 934 here to be on the safe side

https://review.coreboot.org/c/coreboot/+/57294/comment/6bc304f1_81164e07 
PS1, Line 81: 2137
> JEDEC Standard No. 209-4 Table 88 says LPDDR4-4266 tck(avg) min = 0.467ns. 1/0. […]

2134 sounds correct to me