[coreboot-gerrit] Change in coreboot[master]: nb/intel/haswell/finalize.c: Drop obsolete SA PM lock

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46678 )

Change subject: nb/intel/haswell/finalize.c: Drop obsolete SA PM lock
......................................................................

nb/intel/haswell/finalize.c: Drop obsolete SA PM lock

This register had a lock bit on Sandy Bridge, but does not on Haswell.
Moreover, the bit remains cleared on Asrock B85M Pro4 with coreboot.
Therefore, remove the write to this bit, because it has no effect.

Tested on Asrock B85M Pro4, still boots.

Change-Id: I382a6d69233ced5af069767eb61b56741ed665be
Signed-off-by: Angel Pons 
---
M src/northbridge/intel/haswell/finalize.c
1 file changed, 0 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/46678/1

diff --git a/src/northbridge/intel/haswell/finalize.c b/src/northbridge/intel/haswell/finalize.c
index bff0344..ca10146 100644
--- a/src/northbridge/intel/haswell/finalize.c
+++ b/src/northbridge/intel/haswell/finalize.c
@@ -18,7 +18,6 @@
    pci_or_config32(HOST_BRIDGE, TOLUD,       1 << 0);

MCHBAR32_OR(MMIO_PAVP_MSG, 1 << 0);	/* PAVP */
-	MCHBAR32_OR(SAPMCTL, 1UL << 31);	/* SA PM */
    MCHBAR32_OR(UMAGFXCTL, 1 << 0);		/* UMA GFX */
    MCHBAR32_OR(VTDTRKLCK, 1 << 0);		/* VTDTRK */
    MCHBAR32_OR(REQLIM, 1UL << 31);