Morgan Jang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42280 )
Change subject: mb/ocp/deltalake: Implement SMBIOS type 9 by SKU ......................................................................
mb/ocp/deltalake: Implement SMBIOS type 9 by SKU
Create SMBIOS type 9 by getting PCIe config from BMC.
TEST=Check SMBIOS type 9 is created correctly by different SKU.
Change-Id: Ifd2031b91c960ff2add8807247271eb7c38a0bf2 Signed-off-by: Morgan Jang Morgan_Jang@wiwynn.com --- M src/mainboard/ocp/deltalake/ramstage.c 1 file changed, 148 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/42280/1
diff --git a/src/mainboard/ocp/deltalake/ramstage.c b/src/mainboard/ocp/deltalake/ramstage.c index ae11296..bac6eea 100644 --- a/src/mainboard/ocp/deltalake/ramstage.c +++ b/src/mainboard/ocp/deltalake/ramstage.c @@ -4,11 +4,47 @@ #include <drivers/ipmi/ipmi_ops.h> #include <drivers/ocp/dmi/ocp_dmi.h> #include <soc/ramstage.h> +#include <string.h> +#include <smbios.h> +#include <device/pci_def.h> +#include <device/pci_ops.h> +#include <soc/util.h>
#include "ipmi.h"
extern struct fru_info_str fru_strings;
+/* System Slot Socket, Stack, Type and Data bus width Information */ +typedef struct { + u8 stack; + u8 slot_type; + u8 slot_data_bus_width; + u8 dev_func; + const char *slot_designator; +} slot_info; + +#define STACK_BUS0 0x0 +#define STACK_BUS15 0x1 +#define STACK_BUS63 0x2 +#define STACK_BUSB2 0x4 + +slot_info slotinfo[] = { + {STACK_BUS0, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0xE8, "DL on board M.2 #1 - boot"}, + {STACK_BUS63, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x10, "DL on board M.2 #2"}, + {STACK_BUS63, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x18, "Mezz Card"}, + {STACK_BUSB2, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x00, "1ou expansion M.2 #1"}, + {STACK_BUSB2, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x08, "1ou expansion M.2 #2"}, + {STACK_BUSB2, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x10, "1ou expansion M.2 #3"}, + {STACK_BUSB2, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x18, "1ou expansion M.2 #4"}, + {STACK_BUS15, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x00, "2ou expansion M.2 #1"}, + {STACK_BUS15, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x08, "2ou expansion M.2 #2"}, + {STACK_BUS15, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x10, "2ou expansion M.2 #3"}, + {STACK_BUS15, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x18, "2ou expansion M.2 #4"}, + {STACK_BUS63, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x00, "2ou expansion M.2 #5"}, + {STACK_BUS63, SlotTypePciExpressGen3X4, SlotDataBusWidth4X, 0x08, "2ou expansion M.2 #6"}, + {STACK_BUSB2, SlotTypePciExpressGen3X16, SlotDataBusWidth16X, 0x00, "Mezz Card(Class-2)"}, +}; + static void dl_oem_smbios_strings(struct device *dev, struct smbios_type11 *t) { uint8_t pcie_config = 0; @@ -45,10 +81,122 @@ } }
+#if CONFIG(GENERATE_SMBIOS_TABLES) +static int create_smbios_type9(int *handle, unsigned long *current) +{ + int index; + int length = 0; + uint8_t slot_length; + uint8_t sec_bus; + uint8_t slot_usage; + uint8_t pcie_config = 0; + uint8_t characteristics_1 = 0; + uint8_t characteristics_2 = 0; + uint32_t vendor_device_id; + uint32_t stack_busnos[6]; + pci_devfn_t pci_dev; + unsigned int cap; + uint16_t sltcap; + + if (ipmi_get_pcie_config(&pcie_config) != CB_SUCCESS) + printk(BIOS_ERR, "Failed to get IPMI PCIe config\n"); + + get_stack_busnos(stack_busnos); + + for (index = 0; index < sizeof(slotinfo); index++) { + if (pcie_config == PCIE_CONFIG_A) { + if (index == 0 || index == 2) + printk(BIOS_INFO, "Find Config-A slot: %s\n", + slotinfo[index].slot_designator); + else + continue; + } + if (pcie_config == PCIE_CONFIG_B) { + if (index == 0 || index == 1 || index == 2 || index == 3 || index == 4 + || index == 5 || index == 6) + printk(BIOS_INFO, "Find Config-B slot: %s\n", + slotinfo[index].slot_designator); + else + continue; + } + if (pcie_config == PCIE_CONFIG_C) { + if (index == 0 || index == 1 || index == 7 || index == 8 || index == 9 + || index == 10 || index == 11 || index == 12 || index == 13) + printk(BIOS_INFO, "Find Config-C slot: %s\n", + slotinfo[index].slot_designator); + else + continue; + } + if (pcie_config == PCIE_CONFIG_D) { + if (index != 13) + printk(BIOS_INFO, "Find Config-D slot: %s\n", + slotinfo[index].slot_designator); + else + continue; + } + + if (slotinfo[index].slot_data_bus_width == SlotDataBusWidth16X) + slot_length = SlotLengthLong; + else + slot_length = SlotLengthShort; + + pci_dev = PCI_DEV(stack_busnos[index], slotinfo[index].dev_func >> 3, + slotinfo[index].dev_func & 0x7); + sec_bus = pci_s_read_config8(pci_dev, PCI_SECONDARY_BUS); + + if (sec_bus == 0xFF) { + slot_usage = SlotUsageUnknown; + } else { + /* Checking for Slot device availability */ + pci_dev = PCI_DEV(sec_bus, 0, 0); + vendor_device_id = pci_s_read_config32(pci_dev, 0); + if (vendor_device_id == 0xFFFFFFFF) + slot_usage = SlotUsageAvailable; + else + slot_usage = SlotUsageInUse; + } + + characteristics_1 |= SMBIOS_SLOT_3P3V; // Provides33Volts + characteristics_2 |= SMBIOS_SLOT_PME; // PmeSiganalSupported + + cap = pci_s_find_capability(pci_dev, PCI_CAP_ID_PCIE); + sltcap = pci_s_read_config16(pci_dev, cap + PCI_EXP_SLTCAP); + if (sltcap & PCI_EXP_SLTCAP_HPC) + characteristics_2 |= SMBIOS_SLOT_HOTPLUG; + + length += smbios_write_type9(current, handle, + slotinfo[index].slot_designator, + slotinfo[index].slot_type, + slotinfo[index].slot_data_bus_width, + slot_usage, + slot_length, + characteristics_1, + characteristics_2, + stack_busnos[slotinfo[index].stack], + slotinfo[index].dev_func); + } + + return length; +} + +static int mainboard_smbios_data(struct device *dev, int *handle, unsigned long *current) +{ + int len = 0; + + len += create_smbios_type9(handle, current); + + return len; +} +#endif + + static void mainboard_enable(struct device *dev) { dev->ops->get_smbios_strings = dl_oem_smbios_strings, read_fru_areas(BMC_KCS_BASE, FRU_DEVICE_ID, 0, &fru_strings); +#if (CONFIG(GENERATE_SMBIOS_TABLES)) + dev->ops->get_smbios_data = mainboard_smbios_data; +#endif }
void mainboard_silicon_init_params(FSPS_UPD *params)