[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/cannonlake: Add ASL function for setting pad mode

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31444 )

Change subject: soc/intel/cannonlake: Add ASL function for setting pad mode
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soc/intel/cannonlake: Add ASL function for setting pad mode

Add a function in gpio ASL library to set pad mode.

BUG=b:123350329

Change-Id: I6c683f27ddffc3132001706d1694c71bb5664577
Signed-off-by: Rizwan Qureshi 
Reviewed-on: https://review.coreboot.org/c/31444
Tested-by: build bot (Jenkins) 
Reviewed-by: Furquan Shaikh 
---
M src/soc/intel/cannonlake/acpi/gpio_op.asl
M src/soc/intel/cannonlake/include/soc/gpio_defs.h
M src/soc/intel/cannonlake/include/soc/gpio_defs_cnp_h.h
3 files changed, 26 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Furquan Shaikh: Looks good to me, approved

diff --git a/src/soc/intel/cannonlake/acpi/gpio_op.asl b/src/soc/intel/cannonlake/acpi/gpio_op.asl
index 0618601..0c89e99 100644
--- a/src/soc/intel/cannonlake/acpi/gpio_op.asl
+++ b/src/soc/intel/cannonlake/acpi/gpio_op.asl
@@ -72,3 +72,25 @@
    }
    And (Not (GPIOTXSTATE_MASK), VAL0, VAL0)
 }
+
+/*
+ * Set Pad mode
+ * Arg0 - GPIO Number
+ * Arg1 - Pad mode
+ *     0 = GPIO control pad
+ *     1 = Native Function 1
+ *     2 = Native Function 2
+ *     3 = Native Function 3
+ */
+Method (GPMO, 2, Serialized)
+{
+	OperationRegion (PREG, SystemMemory, GADD (Arg0), 4)
+	Field (PREG, AnyAcc, NoLock, Preserve)
+	{
+		VAL0, 32
+	}
+	Store (VAL0, Local0)
+	And (Not (GPIOPADMODE_MASK), Local0, Local0)
+	And (ShiftLeft (Arg1, GPIOPADMODE_SHIFT, Arg1), GPIOPADMODE_MASK, Arg1)
+	Or (Local0, Arg1, VAL0)
+}
diff --git a/src/soc/intel/cannonlake/include/soc/gpio_defs.h b/src/soc/intel/cannonlake/include/soc/gpio_defs.h
index c282000..e8b4f61 100644
--- a/src/soc/intel/cannonlake/include/soc/gpio_defs.h
+++ b/src/soc/intel/cannonlake/include/soc/gpio_defs.h
@@ -253,4 +253,6 @@
 #define GPIORXSTATE_MASK			0x1
 #define GPIORXSTATE_SHIFT			1
 #define GPIOTXSTATE_MASK			0x1
+#define GPIOPADMODE_MASK			0xC00
+#define GPIOPADMODE_SHIFT			10
 #endif
diff --git a/src/soc/intel/cannonlake/include/soc/gpio_defs_cnp_h.h b/src/soc/intel/cannonlake/include/soc/gpio_defs_cnp_h.h
index d8d002c..c74c2d7 100644
--- a/src/soc/intel/cannonlake/include/soc/gpio_defs_cnp_h.h
+++ b/src/soc/intel/cannonlake/include/soc/gpio_defs_cnp_h.h
@@ -327,4 +327,6 @@
 #define GPIORXSTATE_MASK			0x1
 #define GPIORXSTATE_SHIFT			1
 #define GPIOTXSTATE_MASK			0x1
+#define GPIOPADMODE_MASK			0xC00
+#define GPIOPADMODE_SHIFT			10
 #endif