[coreboot-gerrit] Change in coreboot[master]: soc/amd/picasso/sb: Gate FCH AL2AHB clocks

[Matt Papageorge (Code Review)]

Hello build bot (Jenkins), Raul Rangel, Furquan Shaikh, Martin Roth, Marshall Dawson, Angel Pons, Aaron Durbin, Felix Held,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/42829

to look at the new patch set (#7).

Change subject: soc/amd/picasso/sb: Gate FCH AL2AHB clocks
......................................................................

soc/amd/picasso/sb: Gate FCH AL2AHB clocks

Gate the A-Link to AHB Bridge clocks to save power. These
are internal clocks and are unneeded for Raven/Picasso.
This was previously performed within the AGESA FSP but this
change relocates it into coreboot.

BUG=b:154144239
TEST=Check AL2AHB clock gate bits at the end of POST before and
after change with HDT.

Change-Id: Ifcbc144a8769f8ea440cdd560bab146bf5058cf9
Signed-off-by: Matt Papageorge 
---
M src/soc/amd/picasso/include/soc/iomap.h
M src/soc/amd/picasso/southbridge.c
2 files changed, 23 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/42829/7