[coreboot-gerrit] Change in coreboot[master]: soc/amd/picasso: Add SPI speed devicetree settings and EM100 support

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40421 )

Change subject: soc/amd/picasso: Add SPI speed devicetree settings and EM100 support
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Patch Set 3:

(1 comment)

https://review.coreboot.org/c/coreboot/+/40421/3/src/soc/amd/picasso/southbr... 
File src/soc/amd/picasso/southbridge.c:

https://review.coreboot.org/c/coreboot/+/40421/3/src/soc/amd/picasso/southbr... 
PS3, Line 288: sb_spi_init
> I think this function is executed too late. […]

fch_pre_init() is called as part of bootblock as per https://review.coreboot.org/c/coreboot/+/37490/13/src/soc/amd/picasso/bootbl.... So this should still work fine.