Timothy Pearson (tpearson@raptorengineering.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18078
-gerrit
commit db2342033a0921c18cc93adb6236599325928390 Author: Timothy Pearson tpearson@raptorengineering.com Date: Mon Jan 9 17:47:37 2017 -0600
amd/mct: Add default values to highest_rank_count for DDR2
The values of highest_rank_count were undefined on DDR2 systems. Explcitly define these values on DDR2 platforms.
Found-by: Coverity Scan #1347338 Change-Id: Iad7bb00db97b2816fcc44fb5941bd14373451da2 Signed-off-by: Timothy Pearson tpearson@raptorengineering.com --- src/northbridge/amd/amdmct/wrappers/mcti_d.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/src/northbridge/amd/amdmct/wrappers/mcti_d.c b/src/northbridge/amd/amdmct/wrappers/mcti_d.c index 06e4a06..0b08c20 100644 --- a/src/northbridge/amd/amdmct/wrappers/mcti_d.c +++ b/src/northbridge/amd/amdmct/wrappers/mcti_d.c @@ -344,6 +344,7 @@ void mctGet_MaxLoadFreq(struct DCTStatStruc *pDCTstat) uint8_t ch1_voltage = 0; uint8_t ch2_voltage = 0; uint8_t highest_rank_count[2]; + uint8_t dimm; int i; for (i = 0; i < 15; i = i + 2) { if (pDCTstat->DIMMValid & (1 << i)) @@ -363,14 +364,13 @@ void mctGet_MaxLoadFreq(struct DCTStatStruc *pDCTstat) }
#if IS_ENABLED(CONFIG_DIMM_DDR3) - uint8_t dimm; - for (i = 0; i < MAX_DIMMS_SUPPORTED; i = i + 2) { if (pDCTstat->DIMMValid & (1 << i)) ch1_voltage |= pDCTstat->DimmConfiguredVoltage[i]; if (pDCTstat->DIMMValid & (1 << (i + 1))) ch2_voltage |= pDCTstat->DimmConfiguredVoltage[i + 1]; } +#endif
for (i = 0; i < 2; i++) { highest_rank_count[i] = 0x0; @@ -379,7 +379,6 @@ void mctGet_MaxLoadFreq(struct DCTStatStruc *pDCTstat) highest_rank_count[i] = pDCTstat->DimmRanks[dimm]; } } -#endif
/* Set limits if needed */ pDCTstat->PresetmaxFreq = mct_MaxLoadFreq(max(ch1_count, ch2_count), max(highest_rank_count[0], highest_rank_count[1]), (ch1_registered || ch2_registered), (ch1_voltage | ch2_voltage), pDCTstat->PresetmaxFreq);