Edward O'Callaghan (eocallaghan@alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5385
-gerrit
commit 9df2762597d6762093b5d8570d3de4df5d43ea0c Author: Edward O'Callaghan eocallaghan@alterapraxis.com Date: Fri Mar 14 01:06:22 2014 +1100
drivers/hwm: Add a generic hwm driver.
Make generic, testing with Fintek Super I/O....
Change-Id: Ic7bdea55907e379aad9e74b87b514e8038ef9fd0 Signed-off-by: Edward O'Callaghan eocallaghan@alterapraxis.com --- src/drivers/Kconfig | 1 + src/drivers/hwm/Kconfig | 6 +++ src/drivers/hwm/Makefile.inc | 20 ++++++++ src/drivers/hwm/superio_hwm.c | 110 ++++++++++++++++++++++++++++++++++++++++++ src/include/hwm/superio_hwm.h | 10 ++++ 5 files changed, 147 insertions(+)
diff --git a/src/drivers/Kconfig b/src/drivers/Kconfig index 5267ff8..6b793d9 100644 --- a/src/drivers/Kconfig +++ b/src/drivers/Kconfig @@ -40,3 +40,4 @@ source src/drivers/trident/Kconfig source src/drivers/uart/Kconfig source src/drivers/usb/Kconfig source src/drivers/xpowers/Kconfig +source src/drivers/hwm/Kconfig diff --git a/src/drivers/hwm/Kconfig b/src/drivers/hwm/Kconfig new file mode 100644 index 0000000..72ae2bd --- /dev/null +++ b/src/drivers/hwm/Kconfig @@ -0,0 +1,6 @@ +config SUPERIO_HWM + bool "Super I/O HWM" + default n + help + Just enough of a driver to make coreboot control system fans. + No configuration is necessary for the OS to pick up the device. diff --git a/src/drivers/hwm/Makefile.inc b/src/drivers/hwm/Makefile.inc new file mode 100644 index 0000000..9777667 --- /dev/null +++ b/src/drivers/hwm/Makefile.inc @@ -0,0 +1,20 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2014 Edward O'Callaghan eocallaghan@alterapraxis.com +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +ramstage-$(CONFIG_SUPERIO_HWM) += superio_hwm.c diff --git a/src/drivers/hwm/superio_hwm.c b/src/drivers/hwm/superio_hwm.c new file mode 100644 index 0000000..392d4e6 --- /dev/null +++ b/src/drivers/hwm/superio_hwm.c @@ -0,0 +1,110 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Edward O'Callaghan eocallaghan@alterapraxis.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* This code should work for all Fintek Super I/O HWM's. */ +#include <arch/io.h> +#include <console/console.h> +#include <device/device.h> +#include <device/pnp.h> +#include <stdlib.h> +#include <hwm/superio_hwm.h> + +/* Helper functions */ +static void pnp_write_index(u16 port, u8 reg, u8 value) +{ + outb(reg, port); + outb(value, port + 1); +} + +static u8 pnp_read_index(u16 port, u8 reg) +{ + outb(reg, port); + return inb(port + 1); +} +/* .. */ + +/* Initialize F71869AD hardware monitor registers, which are at 0x225. */ +/* XXX: make configurable.. */ +static void init_registers(u16 base) +{ + u8 reg, value; + int i; + + /* XXX: work out correct values??? */ + u8 hwm_reg_values[] = { + /* reg mask data */ + 0x40, 0xff, 0x81, /* Start HWM. */ + 0x48, 0xaa, 0x2a, /* Set SMBus base to 0x2a (0x54 >> 1). */ + 0x4a, 0x21, 0x21, /* Set T2 SMBus base to 0x92>>1 and T3 SMBus base to 0x94>>1. */ + 0x4e, 0x80, 0x00, + 0x43, 0x00, 0xff, + 0x44, 0x00, 0x3f, + 0x4c, 0xbf, 0x18, + 0x4d, 0xff, 0x80, /* Turn off beep */ + }; + + for (i = 0; i < ARRAY_SIZE(hwm_reg_values); i += 3) { + reg = hwm_reg_values[i]; + value = pnp_read_index(base, reg); + value &= 0xff & hwm_reg_values[i + 1]; + value |= 0xff & hwm_reg_values[i + 2]; + printk(BIOS_DEBUG, "base = 0x%04x, reg = 0x%02x, " + "value = 0x%02x\n", base, reg, value); + pnp_write_index(base, reg, value); + } +} +/* .. */ + +/* Main driver */ +void hwm_init(device_t dev, u16 iobase) +{ +// struct resource *res0; + + if (!CONFIG_DRIVERS_SUPERIO_HWM) + return; + + printk(BIOS_DEBUG, "Initializing Fintek Hardware Monitor..\n"); +// res0 = find_resource(dev, PNP_IDX_IO0); +// init_registers(res0->base); + init_registers(iobase); +} + +/* +static void hwm_noop(device_t dummy) +{ +} + +static struct device_operations hwm_ops = { + .read_resources = hwm_noop, + .set_resources = hwm_noop, + .enable_resources = hwm_noop, + .init = hwm_init, +}; + +static void enable_dev(struct device *dev) +{ + dev->ops = &hwm_ops; +} + +struct chip_operations hwm_fintek_ops = { + CHIP_NAME("Fintek F71869AD Super I/O HWM") + .enable_dev = enable_dev +}; +*/ diff --git a/src/include/hwm/superio_hwm.h b/src/include/hwm/superio_hwm.h new file mode 100644 index 0000000..c2cf731 --- /dev/null +++ b/src/include/hwm/superio_hwm.h @@ -0,0 +1,10 @@ +#ifndef SUPERIO_HWM_H +#define SUPERIO_HWM_H + +#include <device/device.h> + +/* Initialization parameters struct?? */ + +void hwm_init(device_t dev, u16 iobase); + +#endif /* SUPERIO_HWM_H */