Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39865 )
Change subject: soc/intel/tigerlake: Reorganize memory initialization support ......................................................................
Patch Set 3:
(4 comments)
https://review.coreboot.org/c/coreboot/+/39865/2/src/soc/intel/tigerlake/inc... File src/soc/intel/tigerlake/include/soc/meminit_tgl.h:
https://review.coreboot.org/c/coreboot/+/39865/2/src/soc/intel/tigerlake/inc... PS2, Line 44: uintptr_t data_ptr; : size_t data_len;
These need to be in a struct together.
Done
https://review.coreboot.org/c/coreboot/+/39865/2/src/soc/intel/tigerlake/mem... File src/soc/intel/tigerlake/meminit_tgl.c:
https://review.coreboot.org/c/coreboot/+/39865/2/src/soc/intel/tigerlake/mem... PS2, Line 22: static uint8_t get_dimm_cfg(uintptr_t dimm0, uintptr_t dimm1)
Oh, I if want disable both channel, I need disable both I need pass NULL ptr.. […]
Disable both channels? Or disable both dimms of same channel?
https://review.coreboot.org/c/coreboot/+/39865/2/src/soc/intel/tigerlake/mem... PS2, Line 40: Reserved9
CL here :https://review.coreboot. […]
Bug here: b/152000235
https://review.coreboot.org/c/coreboot/+/39865/2/src/soc/intel/tigerlake/mem... PS2, Line 170: d
nit: %u, index is unsigned
Done