[coreboot-gerrit] Change in ...coreboot[master]: qcs405: Enable uart_bit_bang

[Name of user not set (Code Review)]

[e-mail] has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/29961

Change subject: qcs405: Enable uart_bit_bang
......................................................................

qcs405: Enable uart_bit_bang

uart_bit_bang has been enabled for VER, ROM, RAM stages.
uart_fill_lb() empty routine has been declared to avoid
compilation error.

Change-Id: I387779a74913ffb58d74d2f2c5d3e22167bbc310
Signed-off-by: Sricharan R 
Signed-off-by: Nitheesh Sekar 
---
M src/soc/qualcomm/qcs405/Makefile.inc
M src/soc/qualcomm/qcs405/uart_bitbang.c
2 files changed, 14 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/29961/1

diff --git a/src/soc/qualcomm/qcs405/Makefile.inc b/src/soc/qualcomm/qcs405/Makefile.inc
index 17ba0f1..6fc87c7 100644
--- a/src/soc/qualcomm/qcs405/Makefile.inc
+++ b/src/soc/qualcomm/qcs405/Makefile.inc
@@ -14,6 +14,7 @@
 verstage-y += spi.c
 verstage-y += timer.c
 verstage-y += gpio.c
+verstage-$(CONFIG_DRIVERS_UART) += uart_bitbang.c
 verstage-$(CONFIG_QC_SOC_SIMULATE) += flash_controller.c

################################################################################
@@ -21,6 +22,8 @@
 romstage-y += cbmem.c
 romstage-y += timer.c
 romstage-y += gpio.c
+romstage-y += mmu.c
+romstage-$(CONFIG_DRIVERS_UART) += uart_bitbang.c
 romstage-$(CONFIG_QC_SOC_SIMULATE) += flash_controller.c

################################################################################
@@ -29,6 +32,7 @@
 ramstage-y += cbmem.c
 ramstage-y += timer.c
 ramstage-y += gpio.c
+ramstage-$(CONFIG_DRIVERS_UART) += uart_bitbang.c
 ramstage-$(CONFIG_QC_SOC_SIMULATE) += flash_controller.c

################################################################################
diff --git a/src/soc/qualcomm/qcs405/uart_bitbang.c b/src/soc/qualcomm/qcs405/uart_bitbang.c
index 8827bc4..97782bd 100644
--- a/src/soc/qualcomm/qcs405/uart_bitbang.c
+++ b/src/soc/qualcomm/qcs405/uart_bitbang.c
@@ -19,6 +19,8 @@

#define UART_TX_PIN GPIO(17)

+void uart_fill_lb(void *data);
+
 static void set_tx(int line_state)
 {
    gpio_set(UART_TX_PIN, line_state);
@@ -43,3 +45,11 @@
 {
    return 0;	/* not implemented */
 }
+
+//HACK
+#ifndef __PRE_RAM__
+/* TODO: Implement function */
+void uart_fill_lb(void *data)
+{
+}
+#endif