[coreboot-gerrit] Change in coreboot[master]: soc/intel: Add Intel Xeon Scalable Processor support

[Jonathan Zhang (Code Review)]

Hello Patrick Rudolph, HAOUAS Elyes, Angel Pons, Johnny Lin, David Hendricks, build bot (Jenkins), Anjaneya "Reddy" Chagam, Patrick Georgi, Martin Roth,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/38548

to look at the new patch set (#26).

Change subject: soc/intel: Add Intel Xeon Scalable Processor support
......................................................................

soc/intel: Add Intel Xeon Scalable Processor support

This patch adds support for Intel Xeon-SP.

This patch is developed and verified with Skylake Scalable
Processor, which is a processor in Xeon-SP family. The code
is expected to be reusable for future geneations of Xeon-SP
processors, and will be updated accordintly to add support
for other Xeon-SP processors, and to improve the code base.

The Skylake-SP FSP is based on FSP 2.0. The FSP is a
proof-of-concept build. The binary is not shared in public,
when this patch is upstreamed.

Signed-off-by: Jonathan Zhang 
Signed-off-by: Reddy Chagam 
Tested-by: [e-mail]
Change-Id: Idc9c3bee17caf8b4841f0bc190cb1aa9d38fc23e
---
M src/drivers/intel/fsp2_0/Kconfig
M src/soc/intel/Kconfig
A src/soc/intel/xeon_sp/Kconfig
A src/soc/intel/xeon_sp/Makefile.inc
A src/soc/intel/xeon_sp/acpi.c
A src/soc/intel/xeon_sp/acpi/globalnvs.asl
A src/soc/intel/xeon_sp/acpi/iiostack.asl
A src/soc/intel/xeon_sp/acpi/pci_irq.asl
A src/soc/intel/xeon_sp/acpi/uncore.asl
A src/soc/intel/xeon_sp/acpi/uncore_irq.asl
A src/soc/intel/xeon_sp/bootblock/bootblock.c
A src/soc/intel/xeon_sp/chip.c
A src/soc/intel/xeon_sp/chip.h
A src/soc/intel/xeon_sp/cpu.c
A src/soc/intel/xeon_sp/hob_display.c
A src/soc/intel/xeon_sp/include/fsp/FspUpd.h
A src/soc/intel/xeon_sp/include/fsp/FspmUpd.h
A src/soc/intel/xeon_sp/include/fsp/FspsUpd.h
A src/soc/intel/xeon_sp/include/fsp/FsptUpd.h
A src/soc/intel/xeon_sp/include/soc/acpi.h
A src/soc/intel/xeon_sp/include/soc/cpu.h
A src/soc/intel/xeon_sp/include/soc/gpe.h
A src/soc/intel/xeon_sp/include/soc/gpio_fsp.h
A src/soc/intel/xeon_sp/include/soc/gpio_soc_defs.h
A src/soc/intel/xeon_sp/include/soc/hob_iiouds.h
A src/soc/intel/xeon_sp/include/soc/hob_memmap.h
A src/soc/intel/xeon_sp/include/soc/iomap.h
A src/soc/intel/xeon_sp/include/soc/irq.h
A src/soc/intel/xeon_sp/include/soc/itss.h
A src/soc/intel/xeon_sp/include/soc/msr.h
A src/soc/intel/xeon_sp/include/soc/nvs.h
A src/soc/intel/xeon_sp/include/soc/p2sb.h
A src/soc/intel/xeon_sp/include/soc/pci_devs.h
A src/soc/intel/xeon_sp/include/soc/pcr_ids.h
A src/soc/intel/xeon_sp/include/soc/pm.h
A src/soc/intel/xeon_sp/include/soc/pmc.h
A src/soc/intel/xeon_sp/include/soc/ramstage.h
A src/soc/intel/xeon_sp/include/soc/romstage.h
A src/soc/intel/xeon_sp/include/soc/smbus.h
A src/soc/intel/xeon_sp/include/soc/soc_config.h
A src/soc/intel/xeon_sp/include/soc/soc_util.h
A src/soc/intel/xeon_sp/lpc.c
A src/soc/intel/xeon_sp/reset.c
A src/soc/intel/xeon_sp/romstage.c
A src/soc/intel/xeon_sp/smihandler.c
A src/soc/intel/xeon_sp/soc_util.c
A src/soc/intel/xeon_sp/spi.c
A src/soc/intel/xeon_sp/uncore.c
A src/soc/intel/xeon_sp/upd_display.c
49 files changed, 9,365 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/38548/26