Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48340 )
Change subject: soc/intel/alderlake: Revise PCIE port config
......................................................................
Patch Set 34:
(3 comments)
https://review.coreboot.org/c/coreboot/+/48340/34/src/mainboard/intel/adlrvp...
File src/mainboard/intel/adlrvp/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/48340/34/src/mainboard/intel/adlrvp...
PS34, Line 80: .flags = PCIE_RP_CLK_REQ_UNUSED,
.clk_req = 0,
https://review.coreboot.org/c/coreboot/+/48340/34/src/mainboard/intel/adlrvp...
PS34, Line 86: .flags = PCIE_RP_CLK_REQ_UNUSED,
.clk_req = 3,
https://review.coreboot.org/c/coreboot/+/48340/34/src/mainboard/intel/adlrvp...
PS34, Line 90: .flags = PCIE_RP_CLK_REQ_UNUSED,
.clk_req = 4,
--
To view, visit
https://review.coreboot.org/c/coreboot/+/48340
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I0b390e43f8e99b19cfad178139b86a2f77d7a57b
Gerrit-Change-Number: 48340
Gerrit-PatchSet: 34
Gerrit-Owner: EricR Lai
ericr_lai@compal.corp-partner.google.com
Gerrit-Reviewer: Furquan Shaikh
furquan@google.com
Gerrit-Reviewer: Martin Roth
martinroth@google.com
Gerrit-Reviewer: Meera Ravindranath
meera.ravindranath@intel.com
Gerrit-Reviewer: Patrick Georgi
pgeorgi@google.com
Gerrit-Reviewer: Patrick Rudolph
siro@das-labor.org
Gerrit-Reviewer: Subrata Banik
subrata.banik@intel.com
Gerrit-Reviewer: Tim Wawrzynczak
twawrzynczak@chromium.org
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Felix Singer
felixsinger@posteo.net
Gerrit-CC: Michael Niewöhner
foss@mniewoehner.de
Gerrit-CC: Paul Menzel
paulepanter@users.sourceforge.net
Gerrit-Comment-Date: Thu, 07 Jan 2021 04:18:29 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment