Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35737 )
Change subject: sb/intel/i82801gx: Correctly align register offset ......................................................................
Patch Set 2:
(3 comments)
https://review.coreboot.org/c/coreboot/+/35737/2/src/southbridge/intel/i8280... File src/southbridge/intel/i82801gx/sata.c:
https://review.coreboot.org/c/coreboot/+/35737/2/src/southbridge/intel/i8280... PS2, Line 97: u32 define as u8 *
https://review.coreboot.org/c/coreboot/+/35737/2/src/southbridge/intel/i8280... PS2, Line 158: ahci_ struct resource *ahci_res = find_resource(dev, PCI_BASE_ADDRESS_5); if (ahci_res != NULL) { ahci_bar = res2mmio(ahci_res); write32(ahci_bar + 0xc, config->sata_ports_implemented); }
https://review.coreboot.org/c/coreboot/+/35737/2/src/southbridge/intel/i8280... PS2, Line 158: 0x24 PCI_BASE_ADDRESS_5