Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30360 )
Change subject: src/mainboard/libretrend/lt1000: Initial commit ......................................................................
Patch Set 10:
(8 comments)
https://review.coreboot.org/c/coreboot/+/30360/6/src/mainboard/libretrend/lt... File src/mainboard/libretrend/lt1000/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/30360/6/src/mainboard/libretrend/lt... PS6, Line 16: $(CONFIG_SUPERIO_ITE_COMMON_ROMSTAGE)
Old code base. Removed the condition.
Done
https://review.coreboot.org/c/coreboot/+/30360/8/src/mainboard/libretrend/lt... File src/mainboard/libretrend/lt1000/acpi/ec.asl:
https://review.coreboot.org/c/coreboot/+/30360/8/src/mainboard/libretrend/lt... PS8, Line 1: /* : * This file is part of the coreboot project. : * : * Copyright (C) 2018 Libretrend LDA : * : * This program is free software; you can redistribute it and/or modify : * it under the terms of the GNU General Public License as published by : * the Free Software Foundation; version 2 of the License. : * : * This program is distributed in the hope that it will be useful, : * but WITHOUT ANY WARRANTY; without even the implied warranty of : * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the : * GNU General Public License for more details. : */ :
Remove? There's nothing in the file to copyright or license.
Done
https://review.coreboot.org/c/coreboot/+/30360/8/src/mainboard/libretrend/lt... File src/mainboard/libretrend/lt1000/acpi/superio.asl:
https://review.coreboot.org/c/coreboot/+/30360/8/src/mainboard/libretrend/lt... PS8, Line 1: /*
Again, remove the header since there's nothing to copyright or license.
Done
https://review.coreboot.org/c/coreboot/+/30360/8/src/mainboard/libretrend/lt... File src/mainboard/libretrend/lt1000/bootblock.c:
https://review.coreboot.org/c/coreboot/+/30360/8/src/mainboard/libretrend/lt... PS8, Line 36: defautl
default
Done
https://review.coreboot.org/c/coreboot/+/30360/7/src/mainboard/libretrend/lt... File src/mainboard/libretrend/lt1000/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/30360/7/src/mainboard/libretrend/lt... PS7, Line 214: device pci 1c.0 on end # PCI Express Port 1
I still need to figure out how many PCI Express lanes does the M.2 slot uses. […]
Done
https://review.coreboot.org/c/coreboot/+/30360/8/src/mainboard/libretrend/lt... File src/mainboard/libretrend/lt1000/dsdt.asl:
https://review.coreboot.org/c/coreboot/+/30360/8/src/mainboard/libretrend/lt... PS8, Line 43:
nit: extra line
Done
https://review.coreboot.org/c/coreboot/+/30360/6/src/mainboard/libretrend/lt... File src/mainboard/libretrend/lt1000/hda_verb.h:
https://review.coreboot.org/c/coreboot/+/30360/6/src/mainboard/libretrend/lt... PS6, Line 42: /* Pin Complex (NID 0x12) */
The verbs are copy-paste from Librem board. They are not implemented yet, thus removed for now. […]
Ack
https://review.coreboot.org/c/coreboot/+/30360/6/src/mainboard/libretrend/lt... File src/mainboard/libretrend/lt1000/hda_verb.c:
https://review.coreboot.org/c/coreboot/+/30360/6/src/mainboard/libretrend/lt... PS6, Line 26: static void codecs_init(u8 *base, u32 codec_mask)
please use src/soc/intel/common/block/hda/hda. […]
Done