Attention is currently required from: Bao Zheng, Jason Glenesk, Marshall Dawson, Zheng Bao, Felix Held.
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50187 )
Change subject: [WIP]soc/amd/cezanne: Add an function to select eSPI channel
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Patch Set 1:
(1 comment)
File src/soc/amd/cezanne/early_fch.c:
https://review.coreboot.org/c/coreboot/+/50187/comment/6b028473_98cf397d
PS1, Line 19: espi_mux_chan0
not sure how I feel about hiding GPIO pin definitions in source files. I feel like these should be defined in the mainboard gpio.c file. Maybe you can provide a macro to include in the bootblock GPIO table that sets up the eSPI pins?
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