[coreboot-gerrit] New patch to review for coreboot: drivers/intel/fsp1_1: Make fsp_run_silicon_init public

[Leroy P Leahy]

Leroy P Leahy ([e-mail]) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13630

-gerrit

commit 980cd5beff1064d769166e123745000f735e9211
Author: Lee Leahy 
Date:   Mon Feb 8 08:37:53 2016 -0800

drivers/intel/fsp1_1: Make fsp_run_silicon_init public

Remove the "static" declaration from fsp_run_silicon_init and declare
    the routine in ramstage.h.  This routine can be called directly if FSP
    when already in RAM.

TEST=Build and run on Galileo

Change-Id: Iddb32d00c5d4447eab5c95b0ad5c40309afa293e
    Signed-off-by: Lee Leahy 
---
 src/drivers/intel/fsp1_1/include/fsp/ramstage.h |  1 +
 src/drivers/intel/fsp1_1/ramstage.c             | 11 ++++++-----
 2 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/src/drivers/intel/fsp1_1/include/fsp/ramstage.h b/src/drivers/intel/fsp1_1/include/fsp/ramstage.h
index 9729a5a..5ce6aa8 100644
--- a/src/drivers/intel/fsp1_1/include/fsp/ramstage.h
+++ b/src/drivers/intel/fsp1_1/include/fsp/ramstage.h
@@ -23,6 +23,7 @@

/* Perform Intel silicon init. */
 void intel_silicon_init(void);
+void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup);
 /* Called after the silicon init code has run. */
 void soc_after_silicon_init(void);
 /* Initialize UPD data before SiliconInit call. */
diff --git a/src/drivers/intel/fsp1_1/ramstage.c b/src/drivers/intel/fsp1_1/ramstage.c
index 20ec323..5b28f7b 100644
--- a/src/drivers/intel/fsp1_1/ramstage.c
+++ b/src/drivers/intel/fsp1_1/ramstage.c
@@ -89,9 +89,8 @@ static void display_hob_info(FSP_INFO_HEADER *fsp_info_header)
    	       "ERROR - Missing one or more required FSP HOBs!\n");
 }

-static void fsp_run_silicon_init(int is_s3_wakeup)
+void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup)
 {
-	FSP_INFO_HEADER *fsp_info_header;
    FSP_SILICON_INIT fsp_silicon_init;
    SILICON_INIT_UPD *original_params;
    SILICON_INIT_UPD silicon_init_params;
@@ -99,8 +98,7 @@ static void fsp_run_silicon_init(int is_s3_wakeup)
    UPD_DATA_REGION *upd_ptr;
    VPD_DATA_REGION *vpd_ptr;

-	/* Find the FSP image */
-	fsp_info_header = fsp_get_fih();
+	/* Display the FSP header */
    if (fsp_info_header == NULL) {
    	printk(BIOS_ERR, "FSP_INFO_HEADER not set!\n");
    	return;
@@ -176,6 +174,7 @@ static int fsp_find_and_relocate(struct prog *fsp)

void intel_silicon_init(void)
 {
+	FSP_INFO_HEADER *fsp_info_header;
    struct prog fsp = PROG_INIT(PROG_REFCODE, "fsp.bin");
    int is_s3_wakeup = acpi_is_wakeup_s3();

@@ -191,7 +190,9 @@ void intel_silicon_init(void)
    /* FSP_INFO_HEADER is set as the program entry. */
    fsp_update_fih(prog_entry(&fsp));

-	fsp_run_silicon_init(is_s3_wakeup);
+	/* Find the FSP image */
+	fsp_info_header = fsp_get_fih();
+	fsp_run_silicon_init(fsp_info_header, is_s3_wakeup);
 }

/* Initialize the UPD parameters for SiliconInit */