Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, Caveh Jalali, Nick Vaccaro, Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47411
to look at the new patch set (#8).
Change subject: soc/intel/common: Adapt XHCI elog driver for reuse ......................................................................
soc/intel/common: Adapt XHCI elog driver for reuse
Currently this XHCI driver assumes the PCH XHCI controller, but the TCSS or North XHCI block has a similar enough PCI MMIO structure to make this code mostly reusable.
1) Rename everything to drop the `pch_` prefix 2) xhci_update_wake_event() now takes in a pci_devfn_t for the XHCI controller 3) soc_get_xhci_usb_info() also now takes a pci_devfn_t for the XHCI controller
BUG=b:172279037 TEST=plug in USB keyboard while in S0, enter S0ix and verify entry via EC; type on keyboard, verify it wakes up, eventlog contains: 39 | 2020-12-10 09:40:21 | S0ix Enter 40 | 2020-12-10 09:40:42 | S0ix Exit 41 | 2020-12-10 09:40:42 | Wake Source | PME - XHCI (USB 2.0 port) | 1 42 | 2020-12-10 09:40:42 | Wake Source | GPE # | 109 which verifies it still functions for the PCH XHCI controller
Change-Id: I9f28354e031e3eda587f4faf8ef7595dce8b33ea Signed-off-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/soc/intel/apollolake/elog.c M src/soc/intel/apollolake/xhci.c M src/soc/intel/cannonlake/elog.c M src/soc/intel/cannonlake/xhci.c M src/soc/intel/common/block/include/intelblocks/xhci.h M src/soc/intel/common/block/xhci/elog.c M src/soc/intel/common/block/xhci/xhci.c M src/soc/intel/jasperlake/elog.c M src/soc/intel/jasperlake/xhci.c M src/soc/intel/skylake/elog.c M src/soc/intel/skylake/xhci.c M src/soc/intel/tigerlake/elog.c M src/soc/intel/tigerlake/xhci.c 13 files changed, 157 insertions(+), 163 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/47411/8