Shaunak Saha has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41811 )
Change subject: [WIP]mb/intel/tglrvp: Set gpio GPP_H1 ......................................................................
[WIP]mb/intel/tglrvp: Set gpio GPP_H1
BUG=none BRANCH=none TEST=Build and boot tglrvp successfully.
Change-Id: Ic0ef33079af7940360c986efacabd6d367aad516 Signed-off-by: Shaunak Saha shaunak.saha@intel.com --- M src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/41811/1
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c index 4457506..6a33dcf 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c @@ -54,6 +54,8 @@ /* CNVi */ PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1), /* CNV_RF_RST_L */ PAD_CFG_NF(GPP_F5, NONE, DEEP, NF3), /* CNV_CLKREQ0 */ + + PAD_CFG_GPO(GPP_H1, 1, DEEP), };
/* Early pad configuration in bootblock */