Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/30858 )
Change subject: mb/google/sarien: Enable Camarillo Device ......................................................................
mb/google/sarien: Enable Camarillo Device
Whiskeylake processor have an internal device called Camarillo dedicated for thermal management support, turn it on so processor thermal driver can be loaded.
BUG=N/A TEST=Boot up and run lspci on Sarien board, Bus 0 Device 4 Funcion 0 can be seen.
Signed-off-by: Lijian Zhao lijian.zhao@intel.com Change-Id: I937960fde2704cddb1fe0058ab622f4b5de401d7 Reviewed-on: https://review.coreboot.org/c/30858 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Patrick Georgi pgeorgi@google.com --- M src/mainboard/google/sarien/variants/arcada/devicetree.cb M src/mainboard/google/sarien/variants/sarien/devicetree.cb 2 files changed, 2 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved
diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb index fa926ae..ff26cbf 100644 --- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb +++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb @@ -35,6 +35,7 @@ register "satapwroptimize" = "1" register "tdp_pl1_override" = "25" register "tdp_pl2_override" = "51" + register "Device4Enable" = "1"
# Intel Common SoC Config register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Left Type-C Port diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb index 48404a8..37ef3dc5 100644 --- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb +++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb @@ -44,6 +44,7 @@ register "SlowSlewRateForFivr" = "2" register "tdp_pl1_override" = "25" register "tdp_pl2_override" = "51" + register "Device4Enable" = "1"
# Intel Common SoC Config register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Left Type-C Port