Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34662 )
Change subject: Documentation/binaries: Add AMD FSP documentation ......................................................................
Patch Set 13:
(4 comments)
https://review.coreboot.org/c/coreboot/+/34662/12/Documentation/binaries/amd... File Documentation/binaries/amd/AMD_FSP_family_17h.md:
https://review.coreboot.org/c/coreboot/+/34662/12/Documentation/binaries/amd... PS12, Line 14: v8
AKA AGESA v8 as I understand it. I could also say "previous AGESA" if you prefer.
Nope, v5 aka Arch2008
https://review.coreboot.org/c/coreboot/+/34662/12/Documentation/binaries/amd... PS12, Line 37: urrently all code is being landed in FSP-M due to AGESA dependencies. : However it's intended that some code will land in FSP-S in the future.
Currently we are initializing (not enumeration) PCIe in FSP-M, and that is a major dependency that A […]
We should figure out what's really happening here. IIRC historically AMD has used the knowledge of PCI intentions to determine memory settings (although I can't think of the reason at them moment). We still may want to move PCIe stuff later, if reasonable.
https://review.coreboot.org/c/coreboot/+/34662/13/Documentation/binaries/amd... File Documentation/binaries/amd/AMD_FSP_family_17h.md:
https://review.coreboot.org/c/coreboot/+/34662/13/Documentation/binaries/amd... PS13, Line 20: BIOS Directory Table ...the BIOS Directory Table...
https://review.coreboot.org/c/coreboot/+/34662/13/Documentation/binaries/amd... PS13, Line 21: reset vector How about "x86 reset vector"