Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44709 )
Change subject: soc/mediatek/mt8192: Add dramc 8 phase calibration
......................................................................
Patch Set 51:
(2 comments)
https://review.coreboot.org/c/coreboot/+/44709/49/src/soc/mediatek/mt8192/dr...
File src/soc/mediatek/mt8192/dramc_pi_calibration_api.c:
https://review.coreboot.org/c/coreboot/+/44709/49/src/soc/mediatek/mt8192/dr...
PS49, Line 308: if (r180 > r0) {
: r_tmp = r0 + ((r180 - r0) >> 2);
: dramc_dbg("R = %u, R180 = %u\n", r_tmp, r180);
: break;
: }
Done
Ack
https://review.coreboot.org/c/coreboot/+/44709/49/src/soc/mediatek/mt8192/dr...
PS49, Line 341: } else {
"break" will follow by a "else"?
Yes.
if (phase_sm == DQS_8PH_DEGREE_0) {
// No break here
} else if (...) {
// No break here
} else {
die(...);
}
break;
--
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Gerrit-Project: coreboot
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