Kyösti Mälkki (kyosti.malkki@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3477
-gerrit
commit 2712474ca442650123cfe92bec83bd4807092f89 Author: Kyösti Mälkki kyosti.malkki@gmail.com Date: Tue Aug 13 09:10:31 2013 +0300
usbdebug: Fixes for LynxPoint LP
Keep the EHCI BAR unchanged to keep usbdebug working.
Change-Id: I7fe0eed24a66cb5058b49ee3fc0350d91089ed7a Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- src/southbridge/intel/lynxpoint/Kconfig | 4 ++-- src/southbridge/intel/lynxpoint/early_usb.c | 10 ++++++++-- 2 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig index 79aba6c..3cf9ffe 100644 --- a/src/southbridge/intel/lynxpoint/Kconfig +++ b/src/southbridge/intel/lynxpoint/Kconfig @@ -27,7 +27,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy select SOUTHBRIDGE_INTEL_COMMON select IOAPIC select HAVE_HARD_RESET - select HAVE_USBDEBUG + select HAVE_USBDEBUG_OPTIONS select USE_WATCHDOG_ON_BOOT select PCIEXP_ASPM select PCIEXP_COMMON_CLOCK @@ -42,7 +42,7 @@ config INTEL_LYNXPOINT_LP
config EHCI_BAR hex - default 0xfef00000 + default 0xe8000000
config EHCI_DEBUG_OFFSET hex diff --git a/src/southbridge/intel/lynxpoint/early_usb.c b/src/southbridge/intel/lynxpoint/early_usb.c index d71467e..d65ca4a 100644 --- a/src/southbridge/intel/lynxpoint/early_usb.c +++ b/src/southbridge/intel/lynxpoint/early_usb.c @@ -24,8 +24,14 @@ #include <device/pci_def.h> #include "pch.h"
-#define PCH_EHCI1_TEMP_BAR0 0xe8000000 -#define PCH_EHCI2_TEMP_BAR0 0xe8000400 + +#if CONFIG_USBDEBUG_HCD_INDEX != 2 +#define PCH_EHCI1_TEMP_BAR0 CONFIG_EHCI_BAR +#define PCH_EHCI2_TEMP_BAR0 (PCH_EHCI1_TEMP_BAR0 + 0x400) +#else +#define PCH_EHCI2_TEMP_BAR0 CONFIG_EHCI_BAR +#define PCH_EHCI1_TEMP_BAR0 (PCH_EHCI2_TEMP_BAR0 + 0x400) +#endif
/* * Setup USB controller MMIO BAR to prevent the