[coreboot-gerrit] [S] Change in coreboot[master]: soc/mediatek/mt8188: enable mfgpll properly and fix SPMI muxes

[Yu-Ping Wu (Code Review)]

Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Yidi Lin.

Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67355 )

Change subject: soc/mediatek/mt8188: enable mfgpll properly and fix SPMI muxes
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Patch Set 1:

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/67355/comment/c422c9d5_c2a6de7b 
PS1, Line 9: We failed to bringup GPU in kernel due to the wrong pll setting.
Some of the pll settings are incorrect, which cause problems in GPU after booting into kernel.

File src/soc/mediatek/mt8188/pll.c:

https://review.coreboot.org/c/coreboot/+/67355/comment/6a9242f5_5cb80c55 
PS1, Line 526: setbits32
Use `clrsetbits32`.