Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34930 )
Change subject: amdfam10: Drop spurious #ifdef __PRE_RAM__ ......................................................................
amdfam10: Drop spurious #ifdef __PRE_RAM__
Change-Id: I4215b27332034a3c07052db92e4abae55c3fe967 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/northbridge/amd/amdfam10/amdfam10.h M src/northbridge/amd/amdfam10/amdfam10_util.c M src/northbridge/amd/amdfam10/util.c M src/southbridge/amd/cimx/sb800/fan.h M src/southbridge/amd/cimx/sb900/cfg.c M src/southbridge/broadcom/bcm5785/bcm5785.h M src/southbridge/nvidia/ck804/ck804.h M src/southbridge/nvidia/ck804/smbus.h M src/southbridge/nvidia/mcp55/mcp55.h 9 files changed, 10 insertions(+), 30 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/34930/1
diff --git a/src/northbridge/amd/amdfam10/amdfam10.h b/src/northbridge/amd/amdfam10/amdfam10.h index 321e87d..96938b2 100644 --- a/src/northbridge/amd/amdfam10/amdfam10.h +++ b/src/northbridge/amd/amdfam10/amdfam10.h @@ -922,13 +922,11 @@
#include "nums.h"
-#ifdef __PRE_RAM__ #if NODE_NUMS == 64 #define NODE_PCI(x, fn) ((x < 32)?(PCI_DEV(CONFIG_CBB,(CONFIG_CDB+x),fn)):(PCI_DEV((CONFIG_CBB-1),(CONFIG_CDB+x-32),fn))) #else #define NODE_PCI(x, fn) PCI_DEV(CONFIG_CBB,(CONFIG_CDB+x),fn) #endif -#endif
/* Include wrapper for MCT (works for DDR2 or DDR3) */ #include <northbridge/amd/amdmct/wrappers/mcti.h> @@ -989,11 +987,8 @@ struct DCTStatStruc DCTstatA[NODE_NUMS]; } __packed;
-#ifndef __PRE_RAM__ struct device *get_node_pci(u32 nodeid, u32 fn); -#endif
-#ifdef __PRE_RAM__ void showallroutes(int level, pci_devfn_t dev);
void setup_resource_map_offset(const u32 *register_values, u32 max, u32 @@ -1017,8 +1012,6 @@ u8 get_sbbusn(u8 sblk); void set_bios_reset(void);
-#endif - #include "northbridge/amd/amdht/porting.h" BOOL AMD_CB_ManualBUIDSwapList(u8 Node, u8 Link, const u8 **List);
diff --git a/src/northbridge/amd/amdfam10/amdfam10_util.c b/src/northbridge/amd/amdfam10/amdfam10_util.c index 292049e..3e8c2fb 100644 --- a/src/northbridge/amd/amdfam10/amdfam10_util.c +++ b/src/northbridge/amd/amdfam10/amdfam10_util.c @@ -14,15 +14,14 @@ * GNU General Public License for more details. */
-#include <console/console.h> - #include <arch/cpu.h> +#include <console/console.h> +#include <device/pci_ops.h> +#include <device/pci_def.h> #include "raminit.h" #include <northbridge/amd/amdmct/amddefs.h>
-#ifndef __PRE_RAM__ -#include <include/device/pci_ops.h> -#include <include/device/pci_def.h> +#ifndef __SIMPLE_DEVICE__ u32 Get_NB32(u32 dev, u32 reg) { return pci_read_config32(pcidev_path_on_root(PCI_DEV2DEVFN(dev)), reg); diff --git a/src/northbridge/amd/amdfam10/util.c b/src/northbridge/amd/amdfam10/util.c index 39c2bfb..ed5556f 100644 --- a/src/northbridge/amd/amdfam10/util.c +++ b/src/northbridge/amd/amdfam10/util.c @@ -21,11 +21,10 @@ * It can be called after RAM is set up by including amdfam10.h and enabling the * compilation of this file in src/northbridge/amd/amdfam10/Makefile.inc. */ -#ifndef __PRE_RAM__ #include <console/console.h> #include <device/pci.h> #include <device/pci_ops.h> -#endif + #include "amdfam10.h"
/* Function 1 */ diff --git a/src/southbridge/amd/cimx/sb800/fan.h b/src/southbridge/amd/cimx/sb800/fan.h index f31e486..3734da1 100644 --- a/src/southbridge/amd/cimx/sb800/fan.h +++ b/src/southbridge/amd/cimx/sb800/fan.h @@ -16,10 +16,10 @@ #ifndef _SB800_FAN_H_ #define _SB800_FAN_H_
-#ifndef __PRE_RAM__ +#include <device/device.h> + void init_sb800_IMC_fans(struct device *dev); void init_sb800_MANUAL_fans(struct device *dev); -#endif
/* Fan Register Definitions */ #define FAN_0_OFFSET 0x00 diff --git a/src/southbridge/amd/cimx/sb900/cfg.c b/src/southbridge/amd/cimx/sb900/cfg.c index 353d577..2e4173f 100644 --- a/src/southbridge/amd/cimx/sb900/cfg.c +++ b/src/southbridge/amd/cimx/sb900/cfg.c @@ -243,15 +243,13 @@ sb_config->PciClks = SB_PCI_CLOCK_RESERVED; sb_config->hwm.hwmEnable = 0x0;
-#ifndef __PRE_RAM__ /* ramstage cimx config here */ - if (!sb_config->StdHeader.CALLBACK.CalloutPtr) { + if (ENV_RAMSTAGE && !sb_config->StdHeader.CALLBACK.CalloutPtr) { sb_config->StdHeader.CALLBACK.CalloutPtr = sb900_callout_entry; }
//sb_config-> -#endif //!__PRE_RAM__ - printk(BIOS_INFO, "SB900 - Cfg.c - sb900_cimx_config - End.\n"); + printk(BIOS_INFO, "SB900 - Cfg.c - sb900_cimx_config - End.\n"); }
void SbPowerOnInit_Config(AMDSBCFG *sb_config) diff --git a/src/southbridge/broadcom/bcm5785/bcm5785.h b/src/southbridge/broadcom/bcm5785/bcm5785.h index 4517dda..e1c6f66 100644 --- a/src/southbridge/broadcom/bcm5785/bcm5785.h +++ b/src/southbridge/broadcom/bcm5785/bcm5785.h @@ -20,11 +20,8 @@ #include <device/device.h> #include "chip.h"
-#ifndef __PRE_RAM__ void bcm5785_enable(struct device *dev); -#else void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn); -#endif
void bcm5785_set_subsystem(struct device *dev, unsigned int vendor, unsigned int device); diff --git a/src/southbridge/nvidia/ck804/ck804.h b/src/southbridge/nvidia/ck804/ck804.h index 5505691..6812b5b 100644 --- a/src/southbridge/nvidia/ck804/ck804.h +++ b/src/southbridge/nvidia/ck804/ck804.h @@ -26,8 +26,6 @@ #define CK804B_BUSN 0x80 #define CK804B_DEVN_BASE (!CONFIG(SB_HT_CHAIN_UNITID_OFFSET_ONLY) ? CK804_DEVN_BASE : 1)
-#ifdef __PRE_RAM__ void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn); -#endif
#endif diff --git a/src/southbridge/nvidia/ck804/smbus.h b/src/southbridge/nvidia/ck804/smbus.h index cec62b3..618e177 100644 --- a/src/southbridge/nvidia/ck804/smbus.h +++ b/src/southbridge/nvidia/ck804/smbus.h @@ -49,7 +49,6 @@ return -3; }
-#ifndef __PRE_RAM__ static int do_smbus_recv_byte(unsigned smbus_io_base, unsigned device) { unsigned char global_status_register, byte; @@ -114,7 +113,6 @@
return 0; } -#endif
static int do_smbus_read_byte(unsigned smbus_io_base, unsigned device, unsigned address) diff --git a/src/southbridge/nvidia/mcp55/mcp55.h b/src/southbridge/nvidia/mcp55/mcp55.h index 8d595c9..944d35a 100644 --- a/src/southbridge/nvidia/mcp55/mcp55.h +++ b/src/southbridge/nvidia/mcp55/mcp55.h @@ -24,11 +24,10 @@ #define MCP55_DEVN_BASE CONFIG_HT_CHAIN_UNITID_BASE #endif
-#ifndef __PRE_RAM__ #include "chip.h" void mcp55_enable(struct device *dev); extern struct pci_operations mcp55_pci_ops; -#else + void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn); void enable_smbus(void); int smbus_recv_byte(unsigned device); @@ -40,6 +39,5 @@ int smbusx_read_byte(unsigned smb_index, unsigned device, unsigned address); int smbusx_write_byte(unsigned smb_index, unsigned device, unsigned address, unsigned char val); -#endif
#endif