[coreboot-gerrit] Change in coreboot[master]: sb/intel/i82801gx: Use 'const' to set pci_devfn_t statically

[Angel Pons (Code Review)]

Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/40226 )

Change subject: sb/intel/i82801gx: Use 'const' to set pci_devfn_t statically
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sb/intel/i82801gx: Use 'const' to set pci_devfn_t statically

Change-Id: I4b33b42f41c7e34c5eab70edf2f12862816220d8
Signed-off-by: Elyes HAOUAS 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40226
Tested-by: build bot (Jenkins) 
Reviewed-by: Paul Menzel 
Reviewed-by: Angel Pons 
---
M src/southbridge/intel/i82801gx/bootblock.c
M src/southbridge/intel/i82801gx/early_smbus.c
2 files changed, 2 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Paul Menzel: Looks good to me, but someone else must approve
  Angel Pons: Looks good to me, approved

diff --git a/src/southbridge/intel/i82801gx/bootblock.c b/src/southbridge/intel/i82801gx/bootblock.c
index 9164c58..44a6846 100644
--- a/src/southbridge/intel/i82801gx/bootblock.c
+++ b/src/southbridge/intel/i82801gx/bootblock.c
@@ -8,7 +8,7 @@
 static void enable_spi_prefetch(void)
 {
    u8 reg8;
-	pci_devfn_t dev = PCI_DEV(0, 0x1f, 0);
+	const pci_devfn_t dev = PCI_DEV(0, 0x1f, 0);

reg8 = pci_read_config8(dev, BIOS_CNTL);
    reg8 &= ~(3 << 2);
diff --git a/src/southbridge/intel/i82801gx/early_smbus.c b/src/southbridge/intel/i82801gx/early_smbus.c
index 3a1369a..1c01301 100644
--- a/src/southbridge/intel/i82801gx/early_smbus.c
+++ b/src/southbridge/intel/i82801gx/early_smbus.c
@@ -14,7 +14,7 @@
 int smbus_enable_iobar(uintptr_t base)
 {
    /* Set the SMBus device statically. */
-	pci_devfn_t dev = PCI_DEV(0x0, 0x1f, 0x3);
+	const pci_devfn_t dev = PCI_DEV(0x0, 0x1f, 0x3);

/* Check to make sure we've got the right device. */
    if (pci_read_config16(dev, 0x2) != 0x27da)