[coreboot-gerrit] Change in coreboot[master]: soc/intel/common: add TCC activation functionality

[Sumeet R Pawnikar (Code Review)]

Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41855 )

Change subject: soc/intel/common: add TCC activation functionality
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Patch Set 9:

(1 comment)

https://review.coreboot.org/c/coreboot/+/41855/9/src/soc/intel/common/block/... 
File src/soc/intel/common/block/cpu/cpulib.c:

https://review.coreboot.org/c/coreboot/+/41855/9/src/soc/intel/common/block/... 
PS9, Line 271: 	msr = rdmsr(MSR_TEMPERATURE_TARGET);
             : 	/* Time Window Tau Bits [6:0] */
             : 	msr.lo &= ~0x7f;
             : 	msr.lo |= 0xe6; /* setting 100ms thermal time window */
             : 	wrmsr(MSR_TEMPERATURE_TARGET, msr);
> I'll look at it tomorrow. Thanks for the quick patch before.

Sorry for breaking Siemens APL mainboards due to this change. I am not sure how to prevent breaking any specific boards/platforms, even here particularly Siemens APL boards for this reason. If you have any info please do share. One thing we can follow that I will try to add you and Werner in patch to notify you in advance going forward for any APL Intel SoC-specific code changes to address this kind of situation.