Lean Sheng Tan has submitted this change. ( https://review.coreboot.org/c/coreboot/+/81619?usp=email )
Change subject: soc/intel/xeon_sp: Share unlock_pam_regions() ......................................................................
soc/intel/xeon_sp: Share unlock_pam_regions()
unlock_pam_regions() is needed for SKX and CPX. Put the codes into chip_gen1.c so that it could be shared among SoC generations.
After shared, unlock_pam_regions() is still called from SKX and CPX SoC specific codes. SPR will also use chip_gen1.c, but it will not call unlock_pam_regions().
TEST=Build and boot on intel/archercity CRB
Change-Id: Idbc7dc6dd22a1747a65543666fc714a0872e6b37 Signed-off-by: Shuo Liu shuo.liu@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/81619 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Lean Sheng Tan sheng.tan@9elements.com --- M src/soc/intel/xeon_sp/chip_gen1.c M src/soc/intel/xeon_sp/cpx/chip.c M src/soc/intel/xeon_sp/include/soc/chip_common.h M src/soc/intel/xeon_sp/skx/chip.c 4 files changed, 30 insertions(+), 47 deletions(-)
Approvals: build bot (Jenkins): Verified Lean Sheng Tan: Looks good to me, approved
diff --git a/src/soc/intel/xeon_sp/chip_gen1.c b/src/soc/intel/xeon_sp/chip_gen1.c index 80ffdda..99f5bd9 100644 --- a/src/soc/intel/xeon_sp/chip_gen1.c +++ b/src/soc/intel/xeon_sp/chip_gen1.c @@ -4,6 +4,9 @@ #include <assert.h> #include <console/console.h> #include <device/pci.h> +#include <device/pci_ids.h> +#include <device/pci_def.h> +#include <soc/pci_devs.h> #include <intelblocks/acpi.h> #include <post.h> #include <soc/acpi.h> @@ -199,3 +202,28 @@ else if (CONFIG(HAVE_IOAT_DOMAINS) && is_ioat_iio_stack_res(sr)) create_ioat_domains(dp, bus, sr, pci_segment_group); } + +/* + * Route PAM segment access to DRAM + * Only call this code from socket0! + */ +void unlock_pam_regions(void) +{ + uint32_t pam0123_unlock_dram = 0x33333330; + uint32_t pam456_unlock_dram = 0x00333333; + /* Get UBOX(1) for socket0 */ + uint32_t bus1 = socket0_get_ubox_busno(PCU_IIO_STACK); + + /* Assume socket0 owns PCI segment 0 */ + pci_io_write_config32(PCI_DEV(bus1, SAD_ALL_DEV, SAD_ALL_FUNC), + SAD_ALL_PAM0123_CSR, pam0123_unlock_dram); + pci_io_write_config32(PCI_DEV(bus1, SAD_ALL_DEV, SAD_ALL_FUNC), + SAD_ALL_PAM456_CSR, pam456_unlock_dram); + + uint32_t reg1 = pci_io_read_config32(PCI_DEV(bus1, SAD_ALL_DEV, + SAD_ALL_FUNC), SAD_ALL_PAM0123_CSR); + uint32_t reg2 = pci_io_read_config32(PCI_DEV(bus1, SAD_ALL_DEV, + SAD_ALL_FUNC), SAD_ALL_PAM456_CSR); + printk(BIOS_DEBUG, "%s:%s pam0123_csr: 0x%x, pam456_csr: 0x%x\n", + __FILE__, __func__, reg1, reg2); +} diff --git a/src/soc/intel/xeon_sp/cpx/chip.c b/src/soc/intel/xeon_sp/cpx/chip.c index b0e61b6..9c86aee 100644 --- a/src/soc/intel/xeon_sp/cpx/chip.c +++ b/src/soc/intel/xeon_sp/cpx/chip.c @@ -161,28 +161,6 @@ set_bios_init_completion(); }
-/* Only call this code from socket0! */ -static void unlock_pam_regions(void) -{ - uint32_t pam0123_unlock_dram = 0x33333330; - uint32_t pam456_unlock_dram = 0x00333333; - /* Get UBOX(1) for socket0 */ - uint32_t bus1 = socket0_get_ubox_busno(PCU_IIO_STACK); - - /* Assume socket0 owns PCI segment 0 */ - pci_io_write_config32(PCI_DEV(bus1, SAD_ALL_DEV, SAD_ALL_FUNC), - SAD_ALL_PAM0123_CSR, pam0123_unlock_dram); - pci_io_write_config32(PCI_DEV(bus1, SAD_ALL_DEV, SAD_ALL_FUNC), - SAD_ALL_PAM456_CSR, pam456_unlock_dram); - - uint32_t reg1 = pci_io_read_config32(PCI_DEV(bus1, SAD_ALL_DEV, - SAD_ALL_FUNC), SAD_ALL_PAM0123_CSR); - uint32_t reg2 = pci_io_read_config32(PCI_DEV(bus1, SAD_ALL_DEV, - SAD_ALL_FUNC), SAD_ALL_PAM456_CSR); - printk(BIOS_DEBUG, "%s:%s pam0123_csr: 0x%x, pam456_csr: 0x%x\n", - __FILE__, __func__, reg1, reg2); -} - static void chip_init(void *data) { unlock_pam_regions(); diff --git a/src/soc/intel/xeon_sp/include/soc/chip_common.h b/src/soc/intel/xeon_sp/include/soc/chip_common.h index 3740426..c499f62 100644 --- a/src/soc/intel/xeon_sp/include/soc/chip_common.h +++ b/src/soc/intel/xeon_sp/include/soc/chip_common.h @@ -89,4 +89,6 @@ #define is_dev_on_domain0(dev) (is_domain0(dev_get_pci_domain(dev))) #define is_stack0(socket, stack) (socket == 0 && stack == IioStack0)
+void unlock_pam_regions(void); + #endif /* _CHIP_COMMON_H_ */ diff --git a/src/soc/intel/xeon_sp/skx/chip.c b/src/soc/intel/xeon_sp/skx/chip.c index fe16e05..903d0cc 100644 --- a/src/soc/intel/xeon_sp/skx/chip.c +++ b/src/soc/intel/xeon_sp/skx/chip.c @@ -3,9 +3,6 @@ #include <cbfs.h> #include <console/console.h> #include <device/pci.h> -#include <device/pci_ids.h> -#include <device/pci_def.h> -#include <soc/pci_devs.h> #include <gpio.h> #include <intelblocks/acpi.h> #include <soc/acpi.h> @@ -38,28 +35,6 @@ } }
-/* Only call this code from socket0! */ -static void unlock_pam_regions(void) -{ - uint32_t pam0123_unlock_dram = 0x33333330; - uint32_t pam456_unlock_dram = 0x00333333; - /* Get UBOX(1) for socket0 */ - uint32_t bus1 = socket0_get_ubox_busno(PCU_IIO_STACK); - - /* Assume socket0 owns PCI segment 0 */ - pci_io_write_config32(PCI_DEV(bus1, SAD_ALL_DEV, SAD_ALL_FUNC), - SAD_ALL_PAM0123_CSR, pam0123_unlock_dram); - pci_io_write_config32(PCI_DEV(bus1, SAD_ALL_DEV, SAD_ALL_FUNC), - SAD_ALL_PAM456_CSR, pam456_unlock_dram); - - uint32_t reg1 = pci_io_read_config32(PCI_DEV(bus1, SAD_ALL_DEV, - SAD_ALL_FUNC), SAD_ALL_PAM0123_CSR); - uint32_t reg2 = pci_io_read_config32(PCI_DEV(bus1, SAD_ALL_DEV, - SAD_ALL_FUNC), SAD_ALL_PAM456_CSR); - printk(BIOS_DEBUG, "%s:%s pam0123_csr: 0x%x, pam456_csr: 0x%x\n", - __FILE__, __func__, reg1, reg2); -} - static void soc_init(void *data) { unlock_pam_regions();