[coreboot-gerrit] [S] Change in coreboot[master]: soc/intel/alderlake: Add option to disable C1E

[Subrata Banik (Code Review)]

Attention is currently required from: YH Lin, Tarun Tuli, Joey Peng, Paul Menzel, Nick Vaccaro.

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74727 )

Change subject: soc/intel/alderlake: Add option to disable C1E
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Patch Set 7:

(1 comment)

Patchset:

PS7:
> Hi Subrata,
>
> Since taeko has ADL SKUs and RPL SKUs, we would like to keep C1E enabled on ADL SKUs.
>
> From FspSUpd.dsc in rplfsp, I saw that C1E is enabled by default, so I think currently it is enabled on all RPL projects.

let me summarise my understanding

1. We would like to keep C1E enabled for ADL SKUs
2. Disable C1E for RPL SKUs
3. We shouldn't rely on FSP UPD defaults

hence, i have suggested to add logic using CPUID instead mainboard

```
if (cpu_id == CPUID_RAPTORLAKE_P_J0 || cpu_id == CPUID_RAPTORLAKE_P_Q0)
   s_cfg->C1e = 0;   // assuming all RPL SKUs are getting covered here 
else
   s_cfg->C1e = 1;   // assuming all ADL SKUs are getting covered here

```