Keith Hui has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/77002?usp=email )
Change subject: google/link, samsung/lumpy: Post-Haswell cleanup ......................................................................
google/link, samsung/lumpy: Post-Haswell cleanup
For these sandybridge boards with MRC raminit support and soldered memory, stop replacing the entire PEI data structure, instead fill only data that cannot be had elsewhere.
Drop mainboard_get_spd() for native raminit as Haswell-style mb_get_spd_map() takes its place.
Drop unused includes as well.
Change-Id: I40e48bd17bc6e2a4f0be1c981fffdc86bc9a6732 Signed-off-by: Keith Hui buurin@gmail.com --- M src/mainboard/google/link/early_init.c M src/mainboard/samsung/lumpy/early_init.c 2 files changed, 23 insertions(+), 112 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/77002/1
diff --git a/src/mainboard/google/link/early_init.c b/src/mainboard/google/link/early_init.c index 9e6fb2c..6ad0c62f 100644 --- a/src/mainboard/google/link/early_init.c +++ b/src/mainboard/google/link/early_init.c @@ -1,17 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <arch/hpet.h> -#include <stdint.h> -#include <string.h> #include <device/pci_ops.h> -#include <console/console.h> #include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit.h> -#include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/gpio.h> #include "ec/google/chromeec/ec.h" -#include <cbfs.h>
#include <southbridge/intel/bd82x6x/chip.h>
@@ -64,76 +58,31 @@ return get_gpios(gpio_vector); }
-static uint8_t *locate_spd(void) -{ - uint8_t *spd_file; - size_t spd_file_len; - unsigned int spd_index = get_spd_index(); - - printk(BIOS_DEBUG, "spd index %d\n", spd_index); - spd_file = cbfs_map("spd.bin", &spd_file_len); - if (!spd_file) - die("SPD data not found."); - - if (spd_file_len < ((spd_index + 1) * 256)) { - printk(BIOS_ERR, "spd index override to 0 - old hardware?\n"); - spd_index = 0; - } - - if (spd_file_len < 256) - die("Missing SPD data."); - - return spd_file + spd_index * 256; -} - void mainboard_fill_pei_data(struct pei_data *pei_data) { - struct pei_data pei_data_template = { - .pei_version = PEI_VERSION, - .mchbar = CONFIG_FIXED_MCHBAR_MMIO_BASE, - .dmibar = CONFIG_FIXED_DMIBAR_MMIO_BASE, - .epbar = CONFIG_FIXED_EPBAR_MMIO_BASE, - .pciexbar = CONFIG_ECAM_MMCONF_BASE_ADDRESS, - .smbusbar = CONFIG_FIXED_SMBUS_IO_BASE, - .wdbbar = 0x4000000, - .wdbsize = 0x1000, - .hpet_address = HPET_BASE_ADDRESS, - .rcba = (uintptr_t)DEFAULT_RCBA, - .pmbase = DEFAULT_PMBASE, - .gpiobase = DEFAULT_GPIOBASE, - .thermalbase = 0xfed08000, - .system_type = 0, // 0 Mobile, 1 Desktop/Server - .tseg_size = CONFIG_SMM_TSEG_SIZE, - .ts_addresses = { 0x00, 0x00, 0x00, 0x00 }, - .ec_present = 1, - .ddr3lv_support = 1, - .max_ddr3_freq = 1600, - .usb_port_config = { - /* Empty and onboard Ports 0-7, set to un-used pin OC3 */ - { 0, 3, 0x0000 }, /* P0: Empty */ - { 1, 0, 0x0040 }, /* P1: Left USB 1 (OC0) */ - { 1, 1, 0x0040 }, /* P2: Left USB 2 (OC1) */ - { 1, 3, 0x0040 }, /* P3: SDCARD (no OC) */ - { 0, 3, 0x0000 }, /* P4: Empty */ - { 1, 3, 0x0040 }, /* P5: WWAN (no OC) */ - { 0, 3, 0x0000 }, /* P6: Empty */ - { 0, 3, 0x0000 }, /* P7: Empty */ - /* Empty and onboard Ports 8-13, set to un-used pin OC4 */ - { 1, 4, 0x0040 }, /* P8: Camera (no OC) */ - { 1, 4, 0x0040 }, /* P9: Bluetooth (no OC) */ - { 0, 4, 0x0000 }, /* P10: Empty */ - { 0, 4, 0x0000 }, /* P11: Empty */ - { 0, 4, 0x0000 }, /* P12: Empty */ - { 0, 4, 0x0000 }, /* P13: Empty */ - }, + uint16_t usbcfg[16][3] = { + /* Empty and onboard Ports 0-7, set to un-used pin OC3 */ + { 0, 3, 0x0000 }, /* P0: Empty */ + { 1, 0, 0x0040 }, /* P1: Left USB 1 (OC0) */ + { 1, 1, 0x0040 }, /* P2: Left USB 2 (OC1) */ + { 1, 3, 0x0040 }, /* P3: SDCARD (no OC) */ + { 0, 3, 0x0000 }, /* P4: Empty */ + { 1, 3, 0x0040 }, /* P5: WWAN (no OC) */ + { 0, 3, 0x0000 }, /* P6: Empty */ + { 0, 3, 0x0000 }, /* P7: Empty */ + /* Empty and onboard Ports 8-13, set to un-used pin OC4 */ + { 1, 4, 0x0040 }, /* P8: Camera (no OC) */ + { 1, 4, 0x0040 }, /* P9: Bluetooth (no OC) */ + { 0, 4, 0x0000 }, /* P10: Empty */ + { 0, 4, 0x0000 }, /* P11: Empty */ + { 0, 4, 0x0000 }, /* P12: Empty */ + { 0, 4, 0x0000 }, /* P13: Empty */ }; - *pei_data = pei_data_template; - /* LINK has 2 channels of memory down, so spd_data[0] and [2] - both need to be populated */ - memcpy(pei_data->spd_data[0], locate_spd(), - sizeof(pei_data->spd_data[0])); - memcpy(pei_data->spd_data[2], pei_data->spd_data[0], - sizeof(pei_data->spd_data[0])); + + memcpy(pei_data->usb_port_config, &usbcfg, sizeof(usbcfg)); + + pei_data->system_type = 0; // 0 Mobile, 1 Desktop/Server + pei_data->max_ddr3_freq = 1600; }
const struct southbridge_usb_port mainboard_usb_ports[] = { @@ -154,16 +103,9 @@ { 0, 0, -1 }, /* P13: Empty */ };
-void mainboard_get_spd(spd_raw_data *spd, bool id_only) -{ - /* LINK has 2 channels of memory down, so spd_data[0] and [2] - both need to be populated */ - memcpy(&spd[0], locate_spd(), 128); - memcpy(&spd[2], &spd[0], 128); -} - void mb_get_spd_map(struct spd_info *spdi) { + /* LINK has 2 channels of memory down */ spdi->addresses[0] = SPD_MEMORY_DOWN; spdi->addresses[2] = SPD_MEMORY_DOWN; spdi->spd_index = get_spd_index(); diff --git a/src/mainboard/samsung/lumpy/early_init.c b/src/mainboard/samsung/lumpy/early_init.c index 0abfbf1..23a6695 100644 --- a/src/mainboard/samsung/lumpy/early_init.c +++ b/src/mainboard/samsung/lumpy/early_init.c @@ -1,20 +1,15 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <arch/hpet.h> -#include <stdint.h> #include <string.h> #include <arch/io.h> #include <bootblock_common.h> -#include <cbfs.h> #include <console/console.h> #include <bootmode.h> #include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit.h> -#include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/gpio.h> #include <superio/smsc/lpc47n207/lpc47n207.h> -#include "option_table.h"
void bootblock_mainboard_early_init(void) { @@ -103,24 +98,8 @@ return spd_index; }
-static const uint8_t *locate_spd(void) -{ - typedef const uint8_t spd_blob[256]; - spd_blob *spd_data; - size_t spd_file_len; - unsigned int spd_index = get_spd_index(); - - spd_data = cbfs_map("spd.bin", &spd_file_len); - if (!spd_data) - die("SPD data not found."); - if (spd_file_len < (spd_index + 1) * 256) - die("Missing SPD data."); - return spd_data[spd_index]; -} - void mainboard_fill_pei_data(struct pei_data *pei_data) { - uint8_t spdaddr[] = {0xa0, 0x00, 0x00, 0x00}; uint8_t tsaddr[] = { 0x30, 0x00, 0x00, 0x00}; uint16_t usbcfg[16][3] = { { 1, 0, 0x0080 }, /* P0: Port 0 (OC0) */ @@ -141,9 +120,7 @@
pei_data->system_type = 0; // 0 Mobile, 1 Desktop/Server memcpy(pei_data->usb_port_config, &usbcfg, sizeof(usbcfg)); - memcpy(pei_data->spd_addresses, &spdaddr, sizeof(spdaddr)); memcpy(pei_data->ts_addresses, &tsaddr, sizeof(tsaddr)); - memcpy(pei_data->spd_data[2], locate_spd(), 256); }
const struct southbridge_usb_port mainboard_usb_ports[] = { @@ -164,14 +141,6 @@ { 0, 0, -1 }, /* P13: Empty */ };
-void mainboard_get_spd(spd_raw_data *spd, bool id_only) -{ - /* get onboard dimm spd */ - memcpy(&spd[2], locate_spd(), 256); - /* read removable dimm spd */ - read_spd(&spd[0], 0x50, id_only); -} - void mb_get_spd_map(struct spd_info *spdi) { spdi->addresses[0] = 0x50;