[coreboot-gerrit] Change in coreboot[master]: mb/google/volteer/delbin: Set GPP_B2 as GPIO

[Duncan Laurie (Code Review)]

Duncan Laurie has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47256 )

Change subject: mb/google/volteer/delbin: Set GPP_B2 as GPIO
......................................................................

mb/google/volteer/delbin: Set GPP_B2 as GPIO

This pin controls the power of the attached M.2 storage device so
it should be configured as a GPIO output and driven high at boot.

BUG=b:160996445
TEST=test suspend/resume with RTD3 enabled

Signed-off-by: Duncan Laurie 
Change-Id: Iaad1a92fed67882d7c937bf22360a3f93d17111d
---
M src/mainboard/google/volteer/variants/delbin/gpio.c
1 file changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/47256/1

diff --git a/src/mainboard/google/volteer/variants/delbin/gpio.c b/src/mainboard/google/volteer/variants/delbin/gpio.c
index 5748bb3..bebf38f 100644
--- a/src/mainboard/google/volteer/variants/delbin/gpio.c
+++ b/src/mainboard/google/volteer/variants/delbin/gpio.c
@@ -27,8 +27,8 @@
    /* A23 : I2S1_SCLK ==> I2S1_SPKR_SCLK */
    PAD_CFG_NF(GPP_A23, NONE, DEEP, NF1),

-	/* B2  : VRALERT# ==> NC */
-	PAD_NC(GPP_B2, NONE),
+	/* B2  : VRALERT# ==> EN_PP3300_SSD */
+	PAD_CFG_GPO(GPP_B2, 1, DEEP),
    /* B9  : I2C5_SDA ==> PCH_I2C5_TRACKPAD_SDA */
    PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1),
    /* B10 : I2C5_SCL ==> PCH_I2C5_TRACKPAD_SCL */