Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37793 )
Change subject: soc/intel/common: Add GPIO PM configuration into NVS ......................................................................
soc/intel/common: Add GPIO PM configuration into NVS
This patch creates options for ASL code to dynamically program MISCCFG.bit 0-5 to perform local clock gating based on devicetree.cb
Change-Id: Ib4f950d97c7d1dbe22f6e57cd502afde6935d831 Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/soc/intel/common/block/acpi/acpi/globalnvs.asl M src/soc/intel/common/block/include/intelblocks/nvs.h 2 files changed, 10 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/37793/1
diff --git a/src/soc/intel/common/block/acpi/acpi/globalnvs.asl b/src/soc/intel/common/block/acpi/acpi/globalnvs.asl index 8e8241b..ce9ebef 100644 --- a/src/soc/intel/common/block/acpi/acpi/globalnvs.asl +++ b/src/soc/intel/common/block/acpi/acpi/globalnvs.asl @@ -47,6 +47,12 @@ U2WE, 16, // 0x2b - 0x2c USB2 Wake Enable Bitmap U3WE, 16, // 0x2d - 0x2e USB3 Wake Enable Bitmap UIOR, 8, // 0x2f - UART debug controller init on S3 resume + OGPM, 8, // 0x30 - Override GPIO Power Management + GPM0, 8, // 0x31 - GPIO Community 0 + GPM1, 8, // 0x32 - GPIO Community 1 + GPM2, 8, // 0x33 - GPIO Community 2 + GPM3, 8, // 0x34 - GPIO Community 3 + GPM4, 8, // 0x35 - GPIO Community 4
/* ChromeOS specific */ Offset (0x100), diff --git a/src/soc/intel/common/block/include/intelblocks/nvs.h b/src/soc/intel/common/block/include/intelblocks/nvs.h index 5f367b6..d3b3bb6 100644 --- a/src/soc/intel/common/block/include/intelblocks/nvs.h +++ b/src/soc/intel/common/block/include/intelblocks/nvs.h @@ -17,6 +17,7 @@ #define SOC_INTEL_COMMON_BLOCK_NVS_H
#include <commonlib/helpers.h> +#include <intelblocks/gpio.h> #include <vendorcode/google/chromeos/gnvs.h>
typedef struct global_nvs_t { @@ -38,7 +39,9 @@ u16 u2we; /* 0x2b - 0x2c USB2 Wake Enable Bitmap */ u16 u3we; /* 0x2d - 0x2e USB3 Wake Enable Bitmap */ u8 uior; /* 0x2f - UART debug controller init on S3 resume */ - u8 unused[208]; + u8 ogpm; /* 0x30 - Override GPIO Power Management */ + u8 gpmv[TOTAL_GPIO_COMM]; /* 0x31 - GPIO PM Value */ + u8 unused[202];
/* ChromeOS specific (0x100 - 0xfff) */ chromeos_acpi_t chromeos;