Maxim Polyakov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40523 )
Change subject: soc/xeon_sp/skx: Define PPIN MSR
......................................................................
Patch Set 11: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/40523/11//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/40523/11//COMMIT_MSG@10
PS11, Line 10:
Please add the document number
(that contains information about this register)
For example:
These changes are in accordance with the documentation:
[*] page 2-297,
Intel(R) 64 and IA-32 Architectures, Developer’s Manual,
Volume 4: Model-Specific Registers. May 2019.
Order Number: 335592-070US
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