[coreboot-gerrit] Change in coreboot[master]: soc/amd/cezanne/fch: implement and use fch_clk_output_48Mhz

[Marshall Dawson (Code Review)]

Attention is currently required from: Jason Glenesk, Felix Held.
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56528 )

Change subject: soc/amd/cezanne/fch: implement and use fch_clk_output_48Mhz
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Patch Set 3: Code-Review+2

(1 comment)

File src/soc/amd/cezanne/include/soc/southbridge.h:

https://review.coreboot.org/c/coreboot/+/56528/comment/42cf5630_bac3ba97 
PS3, Line 81: named MISC_CLK_CNTL1 on Picasso
Ugh