[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/fast_spi: Add support for configuring MTRRs

[Srinidhi N Kaushik (Code Review)]

Srinidhi N Kaushik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47991 )

Change subject: soc/intel/common/fast_spi: Add support for configuring MTRRs
......................................................................

soc/intel/common/fast_spi: Add support for configuring MTRRs

This change enables caching for extended BIOS region.
Currently, caching is enabled for the standard BIOS region
upto a maximum of 16MiB using fast_spi_cache_bios_region,
used the same function to add the support for caching for
extended BIOS region as well.

Changes include:
1. Add a new helper function fast_spi_cache_ext_bios_region()
which calls fast_spi_get_ext_bios_window() to get details
about the extended BIOS window from the boot media map.
2. Make a call to fast_spi_cache_ext_bios_region() from
fast_spi_cache_bios_region ().
3. If the extended window is used, then it enables caching
for this window similar to how it is done for the standard window.

BUG=b:171534504

Signed-off-by: Srinidhi N Kaushik 
Change-Id: I9711f110a35a167efe3a4c912cf46c63c0812779
---
M src/soc/intel/common/block/fast_spi/fast_spi.c
1 file changed, 37 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/47991/1

diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c
index a3ec0d7..d5c6218 100644
--- a/src/soc/intel/common/block/fast_spi/fast_spi.c
+++ b/src/soc/intel/common/block/fast_spi/fast_spi.c
@@ -213,6 +213,40 @@
    return bios_start;
 }

+static void fast_spi_cache_ext_bios_window(void)
+{
+
+	size_t ext_bios_size;
+	uint32_t alignment;
+	uintptr_t ext_bios_base;
+	const int type = MTRR_TYPE_WRPROT;
+
+	if (!CONFIG(FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW))
+		return;
+
+	fast_spi_get_ext_bios_window(&ext_bios_base, &ext_bios_size);
+
+	/* Enable extended bios only if Size of Bios region is greater than 16MiB */
+	if (ext_bios_size == 0 || ext_bios_base == 0)
+		return;
+
+	/* Round to power of two */
+	alignment = 1UL << (log2_ceil(ext_bios_size));
+	ext_bios_size = ALIGN_UP(ext_bios_size, alignment);
+	ext_bios_base = ALIGN_DOWN(ext_bios_base, ext_bios_size);
+
+	if (ENV_PAYLOAD_LOADER) {
+		mtrr_use_temp_range(ext_bios_base, ext_bios_size, type);
+	} else {
+		int mtrr = get_free_var_mtrr();
+
+		if (mtrr == -1)
+			return;
+
+		set_var_mtrr(mtrr, ext_bios_base, ext_bios_size, type);
+	}
+}
+
 void fast_spi_cache_bios_region(void)
 {
    size_t bios_size;
@@ -246,6 +280,9 @@

set_var_mtrr(mtrr, base, bios_size, type);
    }
+
+	/* Check if caching is needed for extended bios region if supported */
+	fast_spi_cache_ext_bios_window();
 }

/* Enable extended bios support