Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/28975 )
Change subject: soc/cavium: dynamic UART initialization for cavium cn8100 ......................................................................
Patch Set 3:
(3 comments)
https://review.coreboot.org/#/c/28975/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/28975/3//COMMIT_MSG@9 PS3, Line 9: Now only those UARTs that are enabled in devicetree.cbare initialized. missing space
https://review.coreboot.org/#/c/28975/3//COMMIT_MSG@11 PS3, Line 11: Tested on Opencellular Elgon missing .
https://review.coreboot.org/#/c/28975/3/src/soc/cavium/cn81xx/soc.c File src/soc/cavium/cn81xx/soc.c:
https://review.coreboot.org/#/c/28975/3/src/soc/cavium/cn81xx/soc.c@398 PS3, Line 398: /*using device enable state from devicetree.cb*/ missing space 2x