Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48858 )
Change subject: soc/intel/apollolake: Fix FSP/GOP display init ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/48858/1/src/soc/intel/apollolake/gr... File src/soc/intel/apollolake/graphics.c:
https://review.coreboot.org/c/coreboot/+/48858/1/src/soc/intel/apollolake/gr... PS1, Line 65: if (CONFIG(RUN_FSP_GOP)) : return;
I don't recall this being an issue on SKL/KBL, but I can re-test there. […]
We (Michael and myself) had an enlightening moment last night. The problem just seems to be about the order. FSP/GOP runs very early in ramstage, completely out of order with the usual device initialization. What happens here is that this code does not read-modify-write some control registers but assumes the hardware is still disabled and hence we could just write 0 to most settings (including the bits that are already set by FSP to enable the display). IOW, after this code ran, the display is disabled, and in the GOP case nothing would enable it later.
What we need is a RMW for PCH_PP_CONTROL and BXT_BLW_PWM_CTL. I'll try to test things on APL later.