[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Refactor TCSS port mux config

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47860 )

Change subject: soc/intel/tigerlake: Refactor TCSS port mux config
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Patch Set 1:
> Patch Set 1:
> > Patch Set 1:
> >
> > also another suggestion, could be another patch, this is already so much better than just raw constants, but would be nice to just specify GPP_A10 for example in the bias_control fields; that would mean decoding the bank and pin numbers though.
>
> ya, i was looking for a way to decode the pin numbers. is that done on the FSP side?

I don't know of a great way, other than
```
if (gpio_num >= GPP_A0 && gpio_num <= GPP_A24) {
      bank = GPIO_BANK_A;
} else if (gpio_num >= GPP_B0 && gpio_num <= GPP_B23) {
      bank = GPIO_BANK_B;
}
```

or the equivalent as a table + loop. I haven't looked much beyond the UPD itself TBH