Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34149 )
Change subject: intel/e7505,i82801dx: Fix SMM_ASEG lock ......................................................................
Patch Set 5:
(4 comments)
Because this change has been merged, votes may not be decreased.
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https://review.coreboot.org/c/coreboot/+/34149/4/src/northbridge/intel/e7505... File src/northbridge/intel/e7505/e7505.h:
https://review.coreboot.org/c/coreboot/+/34149/4/src/northbridge/intel/e7505... PS4, Line 46: #define ESMRAMC 0x9E Used? where?
If you tested that the register exists, that would be ok too.
https://review.coreboot.org/c/coreboot/+/34149/4/src/southbridge/intel/i8280... File src/southbridge/intel/i82801dx/lpc.c:
https://review.coreboot.org/c/coreboot/+/34149/4/src/southbridge/intel/i8280... PS4, Line 305: */ Nit, this is no official comment style. Either
/* line another */
or
/* * line * another */
https://review.coreboot.org/c/coreboot/+/34149/4/src/southbridge/intel/i8280... File src/southbridge/intel/i82801dx/smi.c:
https://review.coreboot.org/c/coreboot/+/34149/4/src/southbridge/intel/i8280... PS4, Line 322: How does the next line work without D_OPEN ond SMRAME?
https://review.coreboot.org/c/coreboot/+/34149/4/src/southbridge/intel/i8280... PS4, Line 30: void northbridge_write_smram(u8 smram); Move below the comment? I think that would make the relation more obvious.