Attention is currently required from: Martin Roth, Paul Menzel, Tim Wawrzynczak, Duncan Laurie, Patrick Rudolph. Francois Toguo Fotso has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49943 )
Change subject: soc/intel/tigerlake: Add CrashLog implementation for intel TGL ......................................................................
Patch Set 10:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/49943/comment/96755780_2d63325c PS9, Line 7: soc/intel/tigerlake: Add CrashLog implementation for intel TGL.
Please remove the period/dot at the end of commit message summaries.
Done
https://review.coreboot.org/c/coreboot/+/49943/comment/72c5c41f_9a524dc7 PS9, Line 11: The state of relevant registers is preserved across a warm reset.
Please add a reference to the specification.
CB:50202 Specs uploaded in CL 50202
https://review.coreboot.org/c/coreboot/+/49943/comment/324d1646_452266d4 PS9, Line 12:
- Why is it SOC specific? […]
1- It is SOC specific because the overall Crashlog architecture is still evolving/changing from SOC to to SOC. It is planned to eventually converge on future SOCs. 2- Documentation added in CB:50202
https://review.coreboot.org/c/coreboot/+/49943/comment/7909f234_66b8b836 PS9, Line 14: TEST=CrashLog data generated, extracted, processed, decoded sucessfully on delbin.
Please add documentation, or add the utilities and how you called them here.
In addition to the document in CB:50202, plans to open source the crashlog decoder is in the work. Once made public, that utility will come with its own documentation or user guide. This CL is meant to enable the crashLog feature on TGL