Furquan Shaikh (furquan@google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18337
-gerrit
commit 05bb48045c961f6a00e016e8b2534d81a20e71b7 Author: Furquan Shaikh furquan@chromium.org Date: Sun Jan 8 13:32:30 2017 -0800
spi: Add function callback to get configuration of SPI bus
BUG=chrome-os-partner:59832
Change-Id: I412c8c70167d18058a32041c2310bc1c884043ce Signed-off-by: Furquan Shaikh furquan@chromium.org --- src/arch/x86/include/arch/acpi_device.h | 18 +------------- src/drivers/spi/spi-generic.c | 10 ++++++++ src/include/spi-generic.h | 42 +++++++++++++++++++++++++++++++++ 3 files changed, 53 insertions(+), 17 deletions(-)
diff --git a/src/arch/x86/include/arch/acpi_device.h b/src/arch/x86/include/arch/acpi_device.h index 6e8f812..aba5c2d 100644 --- a/src/arch/x86/include/arch/acpi_device.h +++ b/src/arch/x86/include/arch/acpi_device.h @@ -18,6 +18,7 @@
#include <device/i2c.h> #include <stdint.h> +#include <spi-generic.h>
#define ACPI_DESCRIPTOR_LARGE (1 << 7) #define ACPI_DESCRIPTOR_INTERRUPT (ACPI_DESCRIPTOR_LARGE | 9) @@ -216,23 +217,6 @@ void acpi_device_write_i2c(const struct acpi_i2c *i2c); * ACPI SPI Bus */
-enum spi_clock_phase { - SPI_CLOCK_PHASE_FIRST, - SPI_CLOCK_PHASE_SECOND -}; - -/* SPI Flags bit 0 */ -enum spi_wire_mode { - SPI_4_WIRE_MODE, - SPI_3_WIRE_MODE -}; - -/* SPI Flags bit 1 */ -enum spi_polarity { - SPI_POLARITY_LOW, - SPI_POLARITY_HIGH -}; - struct acpi_spi { /* Device selection */ uint16_t device_select; diff --git a/src/drivers/spi/spi-generic.c b/src/drivers/spi/spi-generic.c index 805e17a..3ef437c 100644 --- a/src/drivers/spi/spi-generic.c +++ b/src/drivers/spi/spi-generic.c @@ -88,6 +88,16 @@ int spi_xfer(const struct spi_slave *slave, const void *dout, size_t bytesout, return -1; }
+int spi_get_config(const struct spi_slave *slave, struct spi_cfg *cfg) +{ + const struct spi_ctrlr *ctrlr = slave->ctrlr; + + if (ctrlr && ctrlr->get_config) + return ctrlr->get_config(slave, cfg); + + return -1; +} + void __attribute__((weak)) spi_init(void) { /* Default weak implementation - do nothing. */ diff --git a/src/include/spi-generic.h b/src/include/spi-generic.h index 7eb18a6..cc3d3cf 100644 --- a/src/include/spi-generic.h +++ b/src/include/spi-generic.h @@ -59,9 +59,38 @@ struct spi_op { enum spi_op_status status; };
+enum spi_clock_phase { + SPI_CLOCK_PHASE_FIRST, + SPI_CLOCK_PHASE_SECOND +}; + +enum spi_wire_mode { + SPI_4_WIRE_MODE, + SPI_3_WIRE_MODE +}; + +enum spi_polarity { + SPI_POLARITY_LOW, + SPI_POLARITY_HIGH +}; + +struct spi_cfg { + /* CLK phase - 0: Phase first, 1: Phase second */ + enum spi_clock_phase clk_phase; + /* CLK polarity - 0: Low, 1: High */ + enum spi_polarity clk_polarity; + /* CS polarity - 0: Low, 1: High */ + enum spi_polarity cs_polarity; + /* Wire mode - 0: 4-wire, 1: 3-wire */ + enum spi_wire_mode wire_mode; + /* Data bit length. */ + unsigned int data_bit_length; +}; + /*----------------------------------------------------------------------- * Representation of a SPI contoller. * + * get_config: Get configuration of SPI bus * claim_bus: Claim SPI bus and prepare for communication. * release_bus: Release SPI bus. * setup: Setup given SPI device bus. @@ -69,6 +98,8 @@ struct spi_op { * xfer_vector: Vector of SPI transfer operations. */ struct spi_ctrlr { + int (*get_config)(const struct spi_slave *slave, + struct spi_cfg *cfg); int (*claim_bus)(const struct spi_slave *slave); void (*release_bus)(const struct spi_slave *slave); int (*setup)(const struct spi_slave *slave); @@ -101,6 +132,17 @@ extern const size_t spi_ctrlr_bus_map_count; */ void spi_init(void);
+/* + * Get configuration of SPI bus. + * + * slave: Pointer to slave structure. + * cfg: Pointer to SPI configuration that needs to be filled. + * + * Returns: + * 0 on success, -1 on error + */ +int spi_get_config(const struct spi_slave *slave, struct spi_cfg *cfg); + /*----------------------------------------------------------------------- * Set up communications parameters for a SPI slave. *