Edward O'Callaghan (eocallaghan@alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5889
-gerrit
commit 765e94315d18272b5b3eb476a0574cad9394584a Author: Edward O'Callaghan eocallaghan@alterapraxis.com Date: Sat May 31 16:19:40 2014 +1000
mainboard/jetway/nf81-t56n-lf: Provide ACPI thermal zone
NOTFORMERGE - yet - Has a SystemIO conflict with 0x...220 - 0x...227 from somewhere else???
Change-Id: Ibb0295154fca23a3819953db0119692b26096e34 Signed-off-by: Edward O'Callaghan eocallaghan@alterapraxis.com --- src/mainboard/jetway/nf81-t56n-lf/acpi/gpe.asl | 26 +++- .../jetway/nf81-t56n-lf/acpi/mainboard.asl | 1 + src/mainboard/jetway/nf81-t56n-lf/acpi/thermal.asl | 146 ++++++++++++++++++++- 3 files changed, 167 insertions(+), 6 deletions(-)
diff --git a/src/mainboard/jetway/nf81-t56n-lf/acpi/gpe.asl b/src/mainboard/jetway/nf81-t56n-lf/acpi/gpe.asl index bb47ded..a30698a 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/acpi/gpe.asl +++ b/src/mainboard/jetway/nf81-t56n-lf/acpi/gpe.asl @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2011 Advanced Micro Devices, Inc. + * Copyright (C) 2014 Edward O'Callaghan eocallaghan@alterapraxis.com * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -17,7 +18,14 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
-Scope(_GPE) { /* Start Scope GPE */ +Scope(_GPE) +{ + OperationRegion (IP, SystemIO, 0x0225, 0x02) + Field (IP, ByteAcc, NoLock, Preserve) + { + INDX, 8, + DAT0, 8 + }
/* General event 3 */ Method(_L03) { @@ -31,9 +39,21 @@ Scope(_GPE) { /* Start Scope GPE */ }
/* Temp warning (TWarn) event */ - Method(_L09) { + Method(_L09, 0, NotSerialized) + { /* DBGO("\_GPE\_L09\n") */ - /* Notify (_TZ.TZ00, 0x80) */ + Store (GBYT (0x66), Local0) + If (LNotEqual (And (Local0, 0x02), Zero)) + { + Notify (_TZ.THRM, 0x80) + } + } + + Method (GBYT, 1, NotSerialized) + { + Store (Arg0, INDX) + Store (DAT0, Local0) + Return (Local0) }
/* USB controller PME# */ diff --git a/src/mainboard/jetway/nf81-t56n-lf/acpi/mainboard.asl b/src/mainboard/jetway/nf81-t56n-lf/acpi/mainboard.asl index 1f532cf..59027b7 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/acpi/mainboard.asl +++ b/src/mainboard/jetway/nf81-t56n-lf/acpi/mainboard.asl @@ -33,6 +33,7 @@ Name(SSFG, 0x0D) /* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed * Name(OSVR, 3) /* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */ Name(OSV, Ones) /* Assume nothing */ Name(PMOD, One) /* Assume APIC */ +Name (TPCH, Zero) /* Thermal zone channel */
Scope(_SB) { Method(OSFL, 0){ diff --git a/src/mainboard/jetway/nf81-t56n-lf/acpi/thermal.asl b/src/mainboard/jetway/nf81-t56n-lf/acpi/thermal.asl index 2f50475..f061d0c 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/acpi/thermal.asl +++ b/src/mainboard/jetway/nf81-t56n-lf/acpi/thermal.asl @@ -1,6 +1,8 @@ /* * This file is part of the coreboot project. * + * Copyright (C) 2014 Edward O'Callaghan eocallaghan@alterapraxis.com + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. @@ -15,7 +17,145 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
-/* Thermal Zones have been #if 0 for a long time. - * Removing it for now because it doesn't seem to - * do anything when enabled anyway. +/* Thermal Zones. */ + +/* + * Thermal Events + * -------------- + * + * When OSPM receives a temperature change notification, it evaluates the + * thermal zone's temperature interfaces to retrieve current temperature + * values. OSPM compares the current temperature values against the temperature + * thresholds. If any temperature is >= a corresponding "active trip point" + * (_ACx) then OSPM will preform "active cooling". If any temperature is >= a + * corresponding "passive trip point" (_PSV) then OSPM will preform "passive + * cooling". If _HOT >= _TMP then OSPM transitions into S4 sleep and if _HOT >= + * _CRT then OSPM must shutdown the system! + * + * +--+ + * |90|<----- _CRT: Critical shutdown threshold + * | | + * |75|<----- _ACT0: Fan high speed threshold + * |65|<----- _ACT1: Fan low speed threshold + * | | + * |50|<----- _PSV: Passive cooling threshold + * +--+ */ + + +Scope (_TZ) +{ + OperationRegion (IP, SystemIO, 0x0225, 0x02) + Field (IP, ByteAcc, NoLock, Preserve) + { + INDX, 8, + DAT0, 8 + } + + // Handler for throttle requests on this platform + // 0 = Stop throttling + // 1 = Start throttling + Method (THRT, 1, Serialized) + { + If (LEqual (Arg0, 0)) { + /* Disable Power Limit */ +// _SB.PCI0.MCHC.CTLD () + } Else { + /* Enable Power Limit */ +// _SB.PCI0.MCHC.CTLE (\F0PW) + } + } + + ThermalZone (THRM) + { + /* TODO: Change to Super I/O event driven OSPM later.. */ +/* Done with an SCI. AML handler must execute a Notifiy(thermal_zone, 0x80) to inform OSPM a meaningful temp change occured */ +/* Do this^^^ in superio.asl */ + Name (_TC1, 0x02) + Name (_TC2, 0x05) + + // Thermal zone polling frequency: 10 seconds + Name (_TZP, 100) + + // Thermal sampling period for passive cooling: 2 seconds + Name (_TSP, 20) + + /* + * ACPI expects all temperatures to be represented in tenths of degrees + */ + // Convert from Degrees C to 1/10 Kelvin for ACPI + Method (CTOK, 1) { + // 10th of Degrees C + Multiply (Arg0, 10, Local0) + + // Convert to Kelvin + Add (Local0, 2732, Local0) + + Return (Local0) + } + + // Threshold for OS to shutdown + Method (_CRT, 0, Serialized) + { + Return (CTOK (\TCRT)) +// Return (CTOK (STMP ())) + } + +/* + // Threshold for passive cooling + Method (_PSV, 0, Serialized) + { + Return (CTOK (\TPSV)) + } + + // Processors used for passive cooling + Method (_PSL, 0, Serialized) + { + Return (\PPKG ()) + } +*/ + + + // Returns the thermal zone's current operating temperature + Method (_TMP, 0, Serialized) + { + If (LEqual (TPCH, One)) + { + While (LGreater (GBYT (0x7A), 0x7E)) + { + Sleep (0xFA) + Store (One, Local1) + Multiply (0x0A, Local1, Local1) + Add (Local1, 0x0AAC, Local1) + Return (Local1) + } + } + + Return (CTOK (CTMP ())) + } + + Method (STMP, 0, NotSerialized) + { + Store (GBYT (0x82), Local0) + Return (Local0) + } + + Method (CTMP, 0, NotSerialized) + { + Store (GBYT (0x7A), Local0) + If (LGreaterEqual (Local0, 0x65)) + { + Store (0x30, Local0) + } + + Return (Local0) + } + + Method (GBYT, 1, NotSerialized) + { + Store (Arg0, INDX) + Store (DAT0, Local0) + Return (Local0) + } + } +}