Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/27129
Change subject: src/mb: Fix non-local header treated as local ......................................................................
src/mb: Fix non-local header treated as local
Change-Id: I036208a111d009620d8354fa9c97688eb4e872ad Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/mainboard/advansus/a785e-i/mainboard.c M src/mainboard/advansus/a785e-i/romstage.c M src/mainboard/amd/bettong/BiosCallOuts.c M src/mainboard/amd/bettong/mptable.c M src/mainboard/amd/bimini_fam10/mainboard.c M src/mainboard/amd/mahogany_fam10/mainboard.c M src/mainboard/amd/olivehill/mptable.c M src/mainboard/amd/parmer/mptable.c M src/mainboard/amd/thatcher/mptable.c M src/mainboard/amd/tilapia_fam10/mainboard.c M src/mainboard/apple/macbook21/smihandler.c M src/mainboard/apple/macbookair4_2/early_southbridge.c M src/mainboard/asrock/b75pro3-m/romstage.c M src/mainboard/asrock/imb-a180/mptable.c M src/mainboard/asus/f2a85-m/mptable.c M src/mainboard/asus/m4a78-em/mainboard.c M src/mainboard/asus/m4a785-m/mainboard.c M src/mainboard/asus/m5a88-v/mainboard.c M src/mainboard/asus/p5gc-mx/acpi_tables.c M src/mainboard/avalue/eax-785e/mainboard.c M src/mainboard/avalue/eax-785e/romstage.c M src/mainboard/biostar/a68n_5200/mptable.c M src/mainboard/compulab/intense_pc/romstage.c M src/mainboard/emulation/qemu-q35/acpi_tables.c M src/mainboard/getac/p470/acpi_tables.c M src/mainboard/getac/p470/smihandler.c M src/mainboard/gigabyte/ma785gm/mainboard.c M src/mainboard/gigabyte/ma785gmt/mainboard.c M src/mainboard/gigabyte/ma78gm/mainboard.c M src/mainboard/hp/abm/mptable.c M src/mainboard/hp/compaq_8200_elite_sff/romstage.c M src/mainboard/iei/kino-780am2-fam10/mainboard.c M src/mainboard/intel/cougar_canyon2/acpi_tables.c M src/mainboard/intel/cougar_canyon2/gpio.h M src/mainboard/intel/dcp847ske/early_southbridge.c M src/mainboard/intel/dg41wv/acpi_tables.c M src/mainboard/intel/emeraldlake2/acpi_tables.c M src/mainboard/intel/stargo2/gpio.h M src/mainboard/jetway/pa78vm5/mainboard.c M src/mainboard/lenovo/s230u/romstage.c M src/mainboard/lenovo/t400/acpi_tables.c M src/mainboard/lenovo/t400/dock.c M src/mainboard/lenovo/t60/dock.c M src/mainboard/lenovo/t60/smihandler.c M src/mainboard/lenovo/x200/acpi_tables.c M src/mainboard/lenovo/x200/dock.c M src/mainboard/lenovo/x201/dock.c M src/mainboard/lenovo/x201/smihandler.c M src/mainboard/lenovo/x60/dock.c M src/mainboard/lenovo/x60/smihandler.c M src/mainboard/lenovo/z61t/dock.c M src/mainboard/lenovo/z61t/smihandler.c M src/mainboard/msi/ms7721/mptable.c M src/mainboard/packardbell/ms2290/smihandler.c M src/mainboard/pcengines/alix1c/irq_tables.c M src/mainboard/pcengines/alix2d/irq_tables.c M src/mainboard/roda/rk9/acpi_tables.c M src/mainboard/samsung/lumpy/acpi_tables.c M src/mainboard/samsung/stumpy/acpi_tables.c M src/mainboard/sapphire/pureplatinumh61/romstage.c 60 files changed, 95 insertions(+), 142 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/27129/1
diff --git a/src/mainboard/advansus/a785e-i/mainboard.c b/src/mainboard/advansus/a785e-i/mainboard.c index 1381dfa..4b9f581 100644 --- a/src/mainboard/advansus/a785e-i/mainboard.c +++ b/src/mainboard/advansus/a785e-i/mainboard.c @@ -21,7 +21,7 @@ #include <cpu/amd/mtrr.h> #include <southbridge/amd/common/amd_defs.h> #include <device/pci_def.h> -#include "southbridge/amd/rs780/rs780.h" +#include <southbridge/amd/rs780/rs780.h>
/* GPIO6. */ static void enable_int_gfx(void) diff --git a/src/mainboard/advansus/a785e-i/romstage.c b/src/mainboard/advansus/a785e-i/romstage.c index e59773f..087464f 100644 --- a/src/mainboard/advansus/a785e-i/romstage.c +++ b/src/mainboard/advansus/a785e-i/romstage.c @@ -42,7 +42,7 @@ #include <southbridge/amd/sb800/smbus.h> #include <southbridge/amd/sb800/sb800.h> #include <southbridge/amd/rs780/rs780.h> -#include "southbridge/amd/sb800/early_setup.c" +#include <southbridge/amd/sb800/early_setup.c> #include <arch/early_variables.h> #include <cbmem.h>
diff --git a/src/mainboard/amd/bettong/BiosCallOuts.c b/src/mainboard/amd/bettong/BiosCallOuts.c index d9b9570..58d36ae 100644 --- a/src/mainboard/amd/bettong/BiosCallOuts.c +++ b/src/mainboard/amd/bettong/BiosCallOuts.c @@ -24,8 +24,8 @@ #include "hudson.h" #include <stdlib.h> #include <string.h> -#include "northbridge/amd/pi/dimmSpd.h" -#include "northbridge/amd/pi/agesawrapper.h" +#include <northbridge/amd/pi/dimmSpd.h> +#include <northbridge/amd/pi/agesawrapper.h> #include <boardid.h>
static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr); diff --git a/src/mainboard/amd/bettong/mptable.c b/src/mainboard/amd/bettong/mptable.c index c50c254..5a06fe7 100644 --- a/src/mainboard/amd/bettong/mptable.c +++ b/src/mainboard/amd/bettong/mptable.c @@ -22,7 +22,7 @@ #include <stdint.h> #include <arch/cpu.h> #include <cpu/x86/lapic.h> -#include "southbridge/amd/pi/hudson/hudson.h" +#include <southbridge/amd/pi/hudson/hudson.h> #include <southbridge/amd/common/amd_pci_util.h>
static void smp_add_mpc_entry(struct mp_config_table *mc, unsigned length) diff --git a/src/mainboard/amd/bimini_fam10/mainboard.c b/src/mainboard/amd/bimini_fam10/mainboard.c index 3fa2405..572405d 100644 --- a/src/mainboard/amd/bimini_fam10/mainboard.c +++ b/src/mainboard/amd/bimini_fam10/mainboard.c @@ -17,12 +17,10 @@ #include <device/device.h> #include <device/pci.h> #include <arch/io.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> #include <device/pci_def.h> #include <southbridge/amd/common/amd_defs.h> #include <southbridge/amd/sb800/sb800.h> -#include "southbridge/amd/rs780/rs780.h" +#include <southbridge/amd/rs780/rs780.h>
/* GPIO6. */ static void enable_int_gfx(void) diff --git a/src/mainboard/amd/mahogany_fam10/mainboard.c b/src/mainboard/amd/mahogany_fam10/mainboard.c index a4a26e0..9c357f9 100644 --- a/src/mainboard/amd/mahogany_fam10/mainboard.c +++ b/src/mainboard/amd/mahogany_fam10/mainboard.c @@ -17,12 +17,10 @@ #include <device/device.h> #include <device/pci.h> #include <arch/io.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> #include <device/pci_def.h> -#include "southbridge/amd/sb700/sb700.h" -#include "southbridge/amd/sb700/smbus.h" -#include "southbridge/amd/rs780/rs780.h" +#include <southbridge/amd/sb700/sb700.h> +#include <southbridge/amd/sb700/smbus.h> +#include <southbridge/amd/rs780/rs780.h>
/* * Mahogany uses GPIO 6 as PCIe slot reset, GPIO4 as GFX slot reset. We need to diff --git a/src/mainboard/amd/olivehill/mptable.c b/src/mainboard/amd/olivehill/mptable.c index 89881f7..443f551 100644 --- a/src/mainboard/amd/olivehill/mptable.c +++ b/src/mainboard/amd/olivehill/mptable.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */
-#include <console/console.h> #include <arch/smp/mpspec.h> #include <device/pci.h> #include <arch/io.h> @@ -22,7 +21,7 @@ #include <stdint.h> #include <arch/cpu.h> #include <cpu/x86/lapic.h> -#include "southbridge/amd/agesa/hudson/hudson.h" +#include <southbridge/amd/agesa/hudson/hudson.h>
u8 picr_data[0x54] = { 0x03,0x04,0x05,0x07,0x0B,0x0A,0x1F,0x1F,0xFA,0xF1,0x00,0x00,0x1F,0x1F,0x1F,0x1F, diff --git a/src/mainboard/amd/parmer/mptable.c b/src/mainboard/amd/parmer/mptable.c index bbbeb62..e916a24 100644 --- a/src/mainboard/amd/parmer/mptable.c +++ b/src/mainboard/amd/parmer/mptable.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */
-#include <console/console.h> #include <arch/smp/mpspec.h> #include <device/pci.h> #include <arch/io.h> @@ -22,7 +21,7 @@ #include <stdint.h> #include <arch/cpu.h> #include <cpu/x86/lapic.h> -#include "southbridge/amd/agesa/hudson/hudson.h" +#include <southbridge/amd/agesa/hudson/hudson.h>
u8 picr_data[0x54] = { 0x1F,0x1f,0x1f,0x1F,0x1F,0x1F,0x1F,0x1F,0x0A,0xF1,0x00,0x00,0x1F,0x1F,0x1F,0x1F, diff --git a/src/mainboard/amd/thatcher/mptable.c b/src/mainboard/amd/thatcher/mptable.c index 355cff6..06a49d4 100644 --- a/src/mainboard/amd/thatcher/mptable.c +++ b/src/mainboard/amd/thatcher/mptable.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */
-#include <console/console.h> #include <arch/smp/mpspec.h> #include <device/pci.h> #include <arch/io.h> @@ -22,7 +21,7 @@ #include <stdint.h> #include <arch/cpu.h> #include <cpu/x86/lapic.h> -#include "southbridge/amd/agesa/hudson/hudson.h" +#include <southbridge/amd/agesa/hudson/hudson.h>
u8 picr_data[] = { 0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x0A,0xF1,0x00,0x00,0x1F,0x1F,0x1F,0x1F, diff --git a/src/mainboard/amd/tilapia_fam10/mainboard.c b/src/mainboard/amd/tilapia_fam10/mainboard.c index 5e11215..d4baf85 100644 --- a/src/mainboard/amd/tilapia_fam10/mainboard.c +++ b/src/mainboard/amd/tilapia_fam10/mainboard.c @@ -17,12 +17,10 @@ #include <device/device.h> #include <device/pci.h> #include <arch/io.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> #include <device/pci_def.h> #include <southbridge/amd/sb700/sb700.h> -#include "southbridge/amd/sb700/smbus.h" -#include "southbridge/amd/rs780/rs780.h" +#include <southbridge/amd/sb700/smbus.h> +#include <southbridge/amd/rs780/rs780.h>
#define ADT7461_ADDRESS 0x4C #define ARA_ADDRESS 0x0C /* Alert Response Address */ diff --git a/src/mainboard/apple/macbook21/smihandler.c b/src/mainboard/apple/macbook21/smihandler.c index b7c2565..727dad3 100644 --- a/src/mainboard/apple/macbook21/smihandler.c +++ b/src/mainboard/apple/macbook21/smihandler.c @@ -17,8 +17,8 @@ #include <arch/io.h> #include <console/console.h> #include <cpu/x86/smm.h> -#include "southbridge/intel/i82801gx/nvs.h" -#include "southbridge/intel/i82801gx/i82801gx.h" +#include <southbridge/intel/i82801gx/nvs.h> +#include <southbridge/intel/i82801gx/i82801gx.h> #include <pc80/mc146818rtc.h> #include <delay.h>
diff --git a/src/mainboard/apple/macbookair4_2/early_southbridge.c b/src/mainboard/apple/macbookair4_2/early_southbridge.c index 25ddb98..36a0e04 100644 --- a/src/mainboard/apple/macbookair4_2/early_southbridge.c +++ b/src/mainboard/apple/macbookair4_2/early_southbridge.c @@ -21,10 +21,9 @@ #include <device/pnp_def.h> #include <cpu/x86/lapic.h> #include <arch/acpi.h> -#include <console/console.h> -#include "northbridge/intel/sandybridge/sandybridge.h" -#include "northbridge/intel/sandybridge/raminit_native.h" -#include "southbridge/intel/bd82x6x/pch.h" +#include <northbridge/intel/sandybridge/sandybridge.h> +#include <northbridge/intel/sandybridge/raminit_native.h> +#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/rcba.h> #include <southbridge/intel/common/gpio.h> #include <arch/cpu.h> diff --git a/src/mainboard/asrock/b75pro3-m/romstage.c b/src/mainboard/asrock/b75pro3-m/romstage.c index 645fd08..050d6c5 100644 --- a/src/mainboard/asrock/b75pro3-m/romstage.c +++ b/src/mainboard/asrock/b75pro3-m/romstage.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */
-#include "northbridge/intel/sandybridge/raminit_native.h" +#include <northbridge/intel/sandybridge/raminit_native.h> #include <superio/nuvoton/nct6776/nct6776.h> #include <superio/nuvoton/common/nuvoton.h>
diff --git a/src/mainboard/asrock/imb-a180/mptable.c b/src/mainboard/asrock/imb-a180/mptable.c index cf987ca..04bd054 100644 --- a/src/mainboard/asrock/imb-a180/mptable.c +++ b/src/mainboard/asrock/imb-a180/mptable.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */
-#include <console/console.h> #include <arch/smp/mpspec.h> #include <device/pci.h> #include <arch/io.h> @@ -22,7 +21,7 @@ #include <stdint.h> #include <arch/cpu.h> #include <cpu/x86/lapic.h> -#include "southbridge/amd/agesa/hudson/hudson.h" +#include <southbridge/amd/agesa/hudson/hudson.h>
u8 picr_data[0x54] = { diff --git a/src/mainboard/asus/f2a85-m/mptable.c b/src/mainboard/asus/f2a85-m/mptable.c index cf45d94..a66900b 100644 --- a/src/mainboard/asus/f2a85-m/mptable.c +++ b/src/mainboard/asus/f2a85-m/mptable.c @@ -21,7 +21,7 @@ #include <device/pci.h> #include <stdint.h> #include <string.h> -#include "southbridge/amd/agesa/hudson/hudson.h" +#include <southbridge/amd/agesa/hudson/hudson.h>
u8 picr_data[] = { diff --git a/src/mainboard/asus/m4a78-em/mainboard.c b/src/mainboard/asus/m4a78-em/mainboard.c index 87acc56..8a017a0 100644 --- a/src/mainboard/asus/m4a78-em/mainboard.c +++ b/src/mainboard/asus/m4a78-em/mainboard.c @@ -17,12 +17,10 @@ #include <device/device.h> #include <device/pci.h> #include <arch/io.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> #include <device/pci_def.h> -#include "southbridge/amd/sb700/sb700.h" -#include "southbridge/amd/sb700/smbus.h" -#include "southbridge/amd/rs780/rs780.h" +#include <southbridge/amd/sb700/sb700.h> +#include <southbridge/amd/sb700/smbus.h> +#include <southbridge/amd/rs780/rs780.h>
void set_pcie_dereset(void) { diff --git a/src/mainboard/asus/m4a785-m/mainboard.c b/src/mainboard/asus/m4a785-m/mainboard.c index 5acce51..23ead56 100644 --- a/src/mainboard/asus/m4a785-m/mainboard.c +++ b/src/mainboard/asus/m4a785-m/mainboard.c @@ -17,12 +17,10 @@ #include <device/device.h> #include <device/pci.h> #include <arch/io.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> #include <device/pci_def.h> -#include "southbridge/amd/sb700/sb700.h" -#include "southbridge/amd/sb700/smbus.h" -#include "southbridge/amd/rs780/rs780.h" +#include <southbridge/amd/sb700/sb700.h> +#include <southbridge/amd/sb700/smbus.h> +#include <southbridge/amd/rs780/rs780.h>
#define ADT7461_ADDRESS 0x4C #define ARA_ADDRESS 0x0C /* Alert Response Address */ diff --git a/src/mainboard/asus/m5a88-v/mainboard.c b/src/mainboard/asus/m5a88-v/mainboard.c index 75f231e..2eef74f 100644 --- a/src/mainboard/asus/m5a88-v/mainboard.c +++ b/src/mainboard/asus/m5a88-v/mainboard.c @@ -17,11 +17,9 @@ #include <device/device.h> #include <device/pci.h> #include <arch/io.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> #include <southbridge/amd/common/amd_defs.h> #include <device/pci_def.h> -#include "southbridge/amd/rs780/rs780.h" +#include <southbridge/amd/rs780/rs780.h>
/* GPIO6. */ static void enable_int_gfx(void) diff --git a/src/mainboard/asus/p5gc-mx/acpi_tables.c b/src/mainboard/asus/p5gc-mx/acpi_tables.c index ca4cde6..3aa5829 100644 --- a/src/mainboard/asus/p5gc-mx/acpi_tables.c +++ b/src/mainboard/asus/p5gc-mx/acpi_tables.c @@ -15,7 +15,7 @@
#include <types.h>
-#include "southbridge/intel/i82801gx/nvs.h" +#include <southbridge/intel/i82801gx/nvs.h>
void acpi_create_gnvs(global_nvs_t *gnvs) { diff --git a/src/mainboard/avalue/eax-785e/mainboard.c b/src/mainboard/avalue/eax-785e/mainboard.c index 79564a2..6753633 100644 --- a/src/mainboard/avalue/eax-785e/mainboard.c +++ b/src/mainboard/avalue/eax-785e/mainboard.c @@ -17,11 +17,9 @@ #include <device/device.h> #include <device/pci.h> #include <arch/io.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> #include <southbridge/amd/common/amd_defs.h> #include <device/pci_def.h> -#include "southbridge/amd/rs780/rs780.h" +#include <southbridge/amd/rs780/rs780.h>
/* GPIO6. */ static void enable_int_gfx(void) diff --git a/src/mainboard/avalue/eax-785e/romstage.c b/src/mainboard/avalue/eax-785e/romstage.c index 993d078..e2ce482 100644 --- a/src/mainboard/avalue/eax-785e/romstage.c +++ b/src/mainboard/avalue/eax-785e/romstage.c @@ -45,7 +45,7 @@ #include "spd.h" #include <reset.h> #include <southbridge/amd/rs780/rs780.h> -#include "southbridge/amd/sb800/early_setup.c" +#include <southbridge/amd/sb800/early_setup.c>
#include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" diff --git a/src/mainboard/biostar/a68n_5200/mptable.c b/src/mainboard/biostar/a68n_5200/mptable.c index 89881f7..443f551 100644 --- a/src/mainboard/biostar/a68n_5200/mptable.c +++ b/src/mainboard/biostar/a68n_5200/mptable.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */
-#include <console/console.h> #include <arch/smp/mpspec.h> #include <device/pci.h> #include <arch/io.h> @@ -22,7 +21,7 @@ #include <stdint.h> #include <arch/cpu.h> #include <cpu/x86/lapic.h> -#include "southbridge/amd/agesa/hudson/hudson.h" +#include <southbridge/amd/agesa/hudson/hudson.h>
u8 picr_data[0x54] = { 0x03,0x04,0x05,0x07,0x0B,0x0A,0x1F,0x1F,0xFA,0xF1,0x00,0x00,0x1F,0x1F,0x1F,0x1F, diff --git a/src/mainboard/compulab/intense_pc/romstage.c b/src/mainboard/compulab/intense_pc/romstage.c index f690efa..10ddd98 100644 --- a/src/mainboard/compulab/intense_pc/romstage.c +++ b/src/mainboard/compulab/intense_pc/romstage.c @@ -16,7 +16,7 @@ #include <stdint.h> #include <lib.h> #include <arch/io.h> -#include "northbridge/intel/sandybridge/raminit_native.h" +#include <northbridge/intel/sandybridge/raminit_native.h> #include <superio/smsc/sio1007/chip.h> #include <southbridge/intel/common/rcba.h>
diff --git a/src/mainboard/emulation/qemu-q35/acpi_tables.c b/src/mainboard/emulation/qemu-q35/acpi_tables.c index 995fa69..83d25d7 100644 --- a/src/mainboard/emulation/qemu-q35/acpi_tables.c +++ b/src/mainboard/emulation/qemu-q35/acpi_tables.c @@ -15,7 +15,6 @@
#include <types.h> #include <string.h> -#include <console/console.h> #include <arch/acpi.h> #include <arch/ioapic.h> #include <arch/acpigen.h> @@ -26,7 +25,7 @@
#include "../qemu-i440fx/fw_cfg.h" #include "../qemu-i440fx/acpi.h" -#include "southbridge/intel/i82801ix/nvs.h" +#include <southbridge/intel/i82801ix/nvs.h>
void acpi_create_gnvs(global_nvs_t *gnvs) { diff --git a/src/mainboard/getac/p470/acpi_tables.c b/src/mainboard/getac/p470/acpi_tables.c index f840605..9458b8f 100644 --- a/src/mainboard/getac/p470/acpi_tables.c +++ b/src/mainboard/getac/p470/acpi_tables.c @@ -25,7 +25,7 @@ #include <device/pci.h> #include <device/pci_ids.h>
-#include "southbridge/intel/i82801gx/nvs.h" +#include <southbridge/intel/i82801gx/nvs.h> #include "mainboard.h"
void acpi_create_gnvs(global_nvs_t *gnvs) diff --git a/src/mainboard/getac/p470/smihandler.c b/src/mainboard/getac/p470/smihandler.c index 2d1a0cd..5a82044 100644 --- a/src/mainboard/getac/p470/smihandler.c +++ b/src/mainboard/getac/p470/smihandler.c @@ -17,8 +17,8 @@ #include <arch/io.h> #include <console/console.h> #include <cpu/x86/smm.h> -#include "southbridge/intel/i82801gx/i82801gx.h" -#include "southbridge/intel/i82801gx/nvs.h" +#include <southbridge/intel/i82801gx/i82801gx.h> +#include <southbridge/intel/i82801gx/nvs.h> #include <southbridge/intel/common/gpio.h> #include <ec/acpi/ec.h> #include "ec_oem.c" diff --git a/src/mainboard/gigabyte/ma785gm/mainboard.c b/src/mainboard/gigabyte/ma785gm/mainboard.c index 8fbc591..4c9799a5 100644 --- a/src/mainboard/gigabyte/ma785gm/mainboard.c +++ b/src/mainboard/gigabyte/ma785gm/mainboard.c @@ -17,12 +17,10 @@ #include <device/device.h> #include <device/pci.h> #include <arch/io.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> #include <device/pci_def.h> -#include "southbridge/amd/sb700/sb700.h" -#include "southbridge/amd/sb700/smbus.h" -#include "southbridge/amd/rs780/rs780.h" +#include <southbridge/amd/sb700/sb700.h> +#include <southbridge/amd/sb700/smbus.h> +#include <southbridge/amd/rs780/rs780.h>
void set_pcie_dereset(void) { diff --git a/src/mainboard/gigabyte/ma785gmt/mainboard.c b/src/mainboard/gigabyte/ma785gmt/mainboard.c index 8f1dd0a..de90fda 100644 --- a/src/mainboard/gigabyte/ma785gmt/mainboard.c +++ b/src/mainboard/gigabyte/ma785gmt/mainboard.c @@ -17,12 +17,10 @@ #include <device/device.h> #include <device/pci.h> #include <arch/io.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> #include <device/pci_def.h> -#include "southbridge/amd/sb700/sb700.h" -#include "southbridge/amd/sb700/smbus.h" -#include "southbridge/amd/rs780/rs780.h" +#include <southbridge/amd/sb700/sb700.h> +#include <southbridge/amd/sb700/smbus.h> +#include <southbridge/amd/rs780/rs780.h>
#define ADT7461_ADDRESS 0x4C #define ARA_ADDRESS 0x0C /* Alert Response Address */ diff --git a/src/mainboard/gigabyte/ma78gm/mainboard.c b/src/mainboard/gigabyte/ma78gm/mainboard.c index bfd0834..6b0e229 100644 --- a/src/mainboard/gigabyte/ma78gm/mainboard.c +++ b/src/mainboard/gigabyte/ma78gm/mainboard.c @@ -18,12 +18,10 @@ #include <device/device.h> #include <device/pci.h> #include <arch/io.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> #include <device/pci_def.h> -#include "southbridge/amd/sb700/sb700.h" -#include "southbridge/amd/sb700/smbus.h" -#include "southbridge/amd/rs780/rs780.h" +#include <southbridge/amd/sb700/sb700.h> +#include <southbridge/amd/sb700/smbus.h> +#include <southbridge/amd/rs780/rs780.h>
/* * ma78gm-us2h uses GPIO 6 as PCIe slot reset, GPIO4 as GFX slot reset. We need to diff --git a/src/mainboard/hp/abm/mptable.c b/src/mainboard/hp/abm/mptable.c index cf987ca..04bd054 100644 --- a/src/mainboard/hp/abm/mptable.c +++ b/src/mainboard/hp/abm/mptable.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */
-#include <console/console.h> #include <arch/smp/mpspec.h> #include <device/pci.h> #include <arch/io.h> @@ -22,7 +21,7 @@ #include <stdint.h> #include <arch/cpu.h> #include <cpu/x86/lapic.h> -#include "southbridge/amd/agesa/hudson/hudson.h" +#include <southbridge/amd/agesa/hudson/hudson.h>
u8 picr_data[0x54] = { diff --git a/src/mainboard/hp/compaq_8200_elite_sff/romstage.c b/src/mainboard/hp/compaq_8200_elite_sff/romstage.c index 98d5ef4..2197f2d 100644 --- a/src/mainboard/hp/compaq_8200_elite_sff/romstage.c +++ b/src/mainboard/hp/compaq_8200_elite_sff/romstage.c @@ -23,9 +23,9 @@ #include <device/pnp_def.h> #include <superio/nuvoton/npcd378/npcd378.h> #include <superio/nuvoton/common/nuvoton.h> -#include "northbridge/intel/sandybridge/sandybridge.h" -#include "northbridge/intel/sandybridge/raminit_native.h" -#include "southbridge/intel/bd82x6x/pch.h" +#include <northbridge/intel/sandybridge/sandybridge.h> +#include <northbridge/intel/sandybridge/raminit_native.h> +#include <southbridge/intel/bd82x6x/pch.h>
#define SERIAL_DEV PNP_DEV(0x2e, NPCD378_SP2)
diff --git a/src/mainboard/iei/kino-780am2-fam10/mainboard.c b/src/mainboard/iei/kino-780am2-fam10/mainboard.c index b0ffef7..ad1fdd5 100644 --- a/src/mainboard/iei/kino-780am2-fam10/mainboard.c +++ b/src/mainboard/iei/kino-780am2-fam10/mainboard.c @@ -17,12 +17,10 @@ #include <device/device.h> #include <device/pci.h> #include <arch/io.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> #include <device/pci_def.h> -#include "southbridge/amd/sb700/sb700.h" -#include "southbridge/amd/sb700/smbus.h" -#include "southbridge/amd/rs780/rs780.h" +#include <southbridge/amd/sb700/sb700.h> +#include <southbridge/amd/sb700/smbus.h> +#include <southbridge/amd/rs780/rs780.h>
/* TODO - Need to find GPIO for PCIE slot. * Kino uses GPIO ? as PCIe slot reset, GPIO? as GFX slot reset. We need to diff --git a/src/mainboard/intel/cougar_canyon2/acpi_tables.c b/src/mainboard/intel/cougar_canyon2/acpi_tables.c index 3de6d3e..406184f 100644 --- a/src/mainboard/intel/cougar_canyon2/acpi_tables.c +++ b/src/mainboard/intel/cougar_canyon2/acpi_tables.c @@ -16,7 +16,6 @@ #include <types.h> #include <string.h> #include <cbmem.h> -#include <console/console.h> #include <arch/acpi.h> #include <arch/ioapic.h> #include <arch/acpigen.h> @@ -24,8 +23,8 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> +#include <southbridge/intel/fsp_bd82x6x/nvs.h>
-#include "southbridge/intel/fsp_bd82x6x/nvs.h" #include "thermal.h"
static global_nvs_t *gnvs_; diff --git a/src/mainboard/intel/cougar_canyon2/gpio.h b/src/mainboard/intel/cougar_canyon2/gpio.h index c839a12..b4e3915 100644 --- a/src/mainboard/intel/cougar_canyon2/gpio.h +++ b/src/mainboard/intel/cougar_canyon2/gpio.h @@ -17,7 +17,7 @@ #ifndef MAINBOARD_GPIO_H #define MAINBOARD_GPIO_H
-#include "southbridge/intel/fsp_bd82x6x/gpio.h" +#include <southbridge/intel/fsp_bd82x6x/gpio.h>
const struct pch_gpio_set1 pch_gpio_set1_mode = { .gpio0 = GPIO_MODE_GPIO, /* SINAI */ diff --git a/src/mainboard/intel/dcp847ske/early_southbridge.c b/src/mainboard/intel/dcp847ske/early_southbridge.c index 873718f..87acbf4 100644 --- a/src/mainboard/intel/dcp847ske/early_southbridge.c +++ b/src/mainboard/intel/dcp847ske/early_southbridge.c @@ -22,7 +22,7 @@ #include <device/pci_def.h> #include <arch/acpi.h> #include <console/console.h> -#include "northbridge/intel/sandybridge/raminit_native.h" +#include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/common/rcba.h> #include "superio.h" #include "thermal.h" diff --git a/src/mainboard/intel/dg41wv/acpi_tables.c b/src/mainboard/intel/dg41wv/acpi_tables.c index d80fb4c..666bba6 100644 --- a/src/mainboard/intel/dg41wv/acpi_tables.c +++ b/src/mainboard/intel/dg41wv/acpi_tables.c @@ -16,8 +16,7 @@
#include <string.h> #include <stdint.h> - -#include "southbridge/intel/i82801gx/nvs.h" +#include <southbridge/intel/i82801gx/nvs.h>
void acpi_create_gnvs(global_nvs_t *gnvs) { diff --git a/src/mainboard/intel/emeraldlake2/acpi_tables.c b/src/mainboard/intel/emeraldlake2/acpi_tables.c index 3ef993a..92ded3c 100644 --- a/src/mainboard/intel/emeraldlake2/acpi_tables.c +++ b/src/mainboard/intel/emeraldlake2/acpi_tables.c @@ -16,7 +16,6 @@ #include <types.h> #include <string.h> #include <cbmem.h> -#include <console/console.h> #include <arch/acpi.h> #include <arch/ioapic.h> #include <arch/acpigen.h> @@ -25,8 +24,8 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <vendorcode/google/chromeos/gnvs.h> +#include <southbridge/intel/bd82x6x/nvs.h>
-#include "southbridge/intel/bd82x6x/nvs.h" #include "thermal.h"
static global_nvs_t *gnvs_; diff --git a/src/mainboard/intel/stargo2/gpio.h b/src/mainboard/intel/stargo2/gpio.h index 25ecfeb..675580b 100644 --- a/src/mainboard/intel/stargo2/gpio.h +++ b/src/mainboard/intel/stargo2/gpio.h @@ -17,7 +17,7 @@ #ifndef MAINBOARD_GPIO_H #define MAINBOARD_GPIO_H
-#include "southbridge/intel/fsp_i89xx/gpio.h" +#include <southbridge/intel/fsp_i89xx/gpio.h>
const struct pch_gpio_set1 pch_gpio_set1_mode = {
diff --git a/src/mainboard/jetway/pa78vm5/mainboard.c b/src/mainboard/jetway/pa78vm5/mainboard.c index 9585832..066bd2e 100644 --- a/src/mainboard/jetway/pa78vm5/mainboard.c +++ b/src/mainboard/jetway/pa78vm5/mainboard.c @@ -18,12 +18,10 @@ #include <device/device.h> #include <device/pci.h> #include <arch/io.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/mtrr.h> #include <device/pci_def.h> -#include "southbridge/amd/sb700/sb700.h" -#include "southbridge/amd/sb700/smbus.h" -#include "southbridge/amd/rs780/rs780.h" +#include <southbridge/amd/sb700/sb700.h> +#include <southbridge/amd/sb700/smbus.h> +#include <southbridge/amd/rs780/rs780.h>
/* * the board uses GPIO 6 as PCIe slot reset, GPIO4 as GFX slot reset. We need to diff --git a/src/mainboard/lenovo/s230u/romstage.c b/src/mainboard/lenovo/s230u/romstage.c index 83664f4..ae820ae 100644 --- a/src/mainboard/lenovo/s230u/romstage.c +++ b/src/mainboard/lenovo/s230u/romstage.c @@ -25,10 +25,10 @@ #include <cpu/x86/lapic.h> #include <arch/acpi.h> #include <console/console.h> -#include "northbridge/intel/sandybridge/sandybridge.h" -#include "northbridge/intel/sandybridge/raminit_native.h" +#include <northbridge/intel/sandybridge/sandybridge.h> +#include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/common/rcba.h> -#include "southbridge/intel/bd82x6x/pch.h" +#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/gpio.h> #include <arch/cpu.h> #include <cpu/x86/msr.h> diff --git a/src/mainboard/lenovo/t400/acpi_tables.c b/src/mainboard/lenovo/t400/acpi_tables.c index feced93..2893d39 100644 --- a/src/mainboard/lenovo/t400/acpi_tables.c +++ b/src/mainboard/lenovo/t400/acpi_tables.c @@ -15,7 +15,6 @@ */
#include <string.h> -#include <console/console.h> #include <arch/io.h> #include <arch/ioapic.h> #include <arch/acpi.h> @@ -24,8 +23,7 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> - -#include "southbridge/intel/i82801ix/nvs.h" +#include <southbridge/intel/i82801ix/nvs.h>
void acpi_create_gnvs(global_nvs_t *gnvs) { diff --git a/src/mainboard/lenovo/t400/dock.c b/src/mainboard/lenovo/t400/dock.c index 74711e1..0c6db0b 100644 --- a/src/mainboard/lenovo/t400/dock.c +++ b/src/mainboard/lenovo/t400/dock.c @@ -25,7 +25,7 @@ #include "dock.h" #include <superio/nsc/pc87382/pc87382.h>
-#include "southbridge/intel/i82801ix/i82801ix.h" +#include <southbridge/intel/i82801ix/i82801ix.h> #include "ec/lenovo/h8/h8.h" #include <ec/acpi/ec.h>
diff --git a/src/mainboard/lenovo/t60/dock.c b/src/mainboard/lenovo/t60/dock.c index 0e24b95..05dd65e 100644 --- a/src/mainboard/lenovo/t60/dock.c +++ b/src/mainboard/lenovo/t60/dock.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */
-#include <console/console.h> #include <device/device.h> #include <arch/io.h> #include <delay.h> @@ -22,7 +21,7 @@ #include <superio/nsc/pc87384/pc87384.h> #include "ec/acpi/ec.h" #include "ec/lenovo/pmh7/pmh7.h" -#include "southbridge/intel/i82801gx/i82801gx.h" +#include <southbridge/intel/i82801gx/i82801gx.h>
#define DLPC_CONTROL 0x164c
diff --git a/src/mainboard/lenovo/t60/smihandler.c b/src/mainboard/lenovo/t60/smihandler.c index efb0ac4..7707d62 100644 --- a/src/mainboard/lenovo/t60/smihandler.c +++ b/src/mainboard/lenovo/t60/smihandler.c @@ -17,8 +17,8 @@ #include <arch/io.h> #include <console/console.h> #include <cpu/x86/smm.h> -#include "southbridge/intel/i82801gx/nvs.h" -#include "southbridge/intel/i82801gx/i82801gx.h" +#include <southbridge/intel/i82801gx/nvs.h> +#include <southbridge/intel/i82801gx/i82801gx.h> #include <ec/acpi/ec.h> #include "dock.h" #include "smi.h" diff --git a/src/mainboard/lenovo/x200/acpi_tables.c b/src/mainboard/lenovo/x200/acpi_tables.c index 43a0fc8..2893d39 100644 --- a/src/mainboard/lenovo/x200/acpi_tables.c +++ b/src/mainboard/lenovo/x200/acpi_tables.c @@ -15,7 +15,6 @@ */
#include <string.h> -#include <console/console.h> #include <arch/io.h> #include <arch/ioapic.h> #include <arch/acpi.h> @@ -24,8 +23,8 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> +#include <southbridge/intel/i82801ix/nvs.h>
-#include "southbridge/intel/i82801ix/nvs.h" void acpi_create_gnvs(global_nvs_t *gnvs) { memset((void *)gnvs, 0, sizeof(*gnvs)); diff --git a/src/mainboard/lenovo/x200/dock.c b/src/mainboard/lenovo/x200/dock.c index 836ff35..5bf2cd3 100644 --- a/src/mainboard/lenovo/x200/dock.c +++ b/src/mainboard/lenovo/x200/dock.c @@ -22,7 +22,7 @@ #include <device/pci.h> #include <delay.h> #include "dock.h" -#include "southbridge/intel/i82801ix/i82801ix.h" +#include <southbridge/intel/i82801ix/i82801ix.h> #include "ec/lenovo/h8/h8.h" #include <ec/acpi/ec.h>
diff --git a/src/mainboard/lenovo/x201/dock.c b/src/mainboard/lenovo/x201/dock.c index 1941ac6..a11c720 100644 --- a/src/mainboard/lenovo/x201/dock.c +++ b/src/mainboard/lenovo/x201/dock.c @@ -22,7 +22,7 @@ #include <device/pci.h> #include <delay.h> #include "dock.h" -#include "southbridge/intel/ibexpeak/pch.h" +#include <southbridge/intel/ibexpeak/pch.h> #include "ec/lenovo/h8/h8.h" #include <ec/acpi/ec.h>
diff --git a/src/mainboard/lenovo/x201/smihandler.c b/src/mainboard/lenovo/x201/smihandler.c index f00ae0d..93cc2b7 100644 --- a/src/mainboard/lenovo/x201/smihandler.c +++ b/src/mainboard/lenovo/x201/smihandler.c @@ -17,9 +17,9 @@ #include <arch/io.h> #include <console/console.h> #include <cpu/x86/smm.h> -#include "southbridge/intel/ibexpeak/nvs.h" -#include "southbridge/intel/ibexpeak/pch.h" -#include "southbridge/intel/ibexpeak/me.h" +#include <southbridge/intel/ibexpeak/nvs.h> +#include <southbridge/intel/ibexpeak/pch.h> +#include <southbridge/intel/ibexpeak/me.h> #include <northbridge/intel/nehalem/nehalem.h> #include <cpu/intel/model_2065x/model_2065x.h> #include <ec/acpi/ec.h> diff --git a/src/mainboard/lenovo/x60/dock.c b/src/mainboard/lenovo/x60/dock.c index c2bed9a..5b49498 100644 --- a/src/mainboard/lenovo/x60/dock.c +++ b/src/mainboard/lenovo/x60/dock.c @@ -20,7 +20,7 @@ #include <delay.h> #include <arch/io.h> #include "dock.h" -#include "southbridge/intel/i82801gx/i82801gx.h" +#include <southbridge/intel/i82801gx/i82801gx.h> #include <superio/nsc/pc87392/pc87392.h>
static void dlpc_write_register(int reg, int value) diff --git a/src/mainboard/lenovo/x60/smihandler.c b/src/mainboard/lenovo/x60/smihandler.c index b9f0a57..c66474d 100644 --- a/src/mainboard/lenovo/x60/smihandler.c +++ b/src/mainboard/lenovo/x60/smihandler.c @@ -17,8 +17,8 @@ #include <arch/io.h> #include <console/console.h> #include <cpu/x86/smm.h> -#include "southbridge/intel/i82801gx/nvs.h" -#include "southbridge/intel/i82801gx/i82801gx.h" +#include <southbridge/intel/i82801gx/nvs.h> +#include <southbridge/intel/i82801gx/i82801gx.h> #include <ec/acpi/ec.h> #include <pc80/mc146818rtc.h> #include <ec/lenovo/h8/h8.h> diff --git a/src/mainboard/lenovo/z61t/dock.c b/src/mainboard/lenovo/z61t/dock.c index 0e24b95..05dd65e 100644 --- a/src/mainboard/lenovo/z61t/dock.c +++ b/src/mainboard/lenovo/z61t/dock.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */
-#include <console/console.h> #include <device/device.h> #include <arch/io.h> #include <delay.h> @@ -22,7 +21,7 @@ #include <superio/nsc/pc87384/pc87384.h> #include "ec/acpi/ec.h" #include "ec/lenovo/pmh7/pmh7.h" -#include "southbridge/intel/i82801gx/i82801gx.h" +#include <southbridge/intel/i82801gx/i82801gx.h>
#define DLPC_CONTROL 0x164c
diff --git a/src/mainboard/lenovo/z61t/smihandler.c b/src/mainboard/lenovo/z61t/smihandler.c index ef5cfc6..d98a809 100644 --- a/src/mainboard/lenovo/z61t/smihandler.c +++ b/src/mainboard/lenovo/z61t/smihandler.c @@ -17,8 +17,8 @@ #include <arch/io.h> #include <console/console.h> #include <cpu/x86/smm.h> -#include "southbridge/intel/i82801gx/nvs.h" -#include "southbridge/intel/i82801gx/i82801gx.h" +#include <southbridge/intel/i82801gx/nvs.h> +#include <southbridge/intel/i82801gx/i82801gx.h> #include <ec/acpi/ec.h> #include "dock.h" #include "smi.h" diff --git a/src/mainboard/msi/ms7721/mptable.c b/src/mainboard/msi/ms7721/mptable.c index cf45d94..a66900b 100644 --- a/src/mainboard/msi/ms7721/mptable.c +++ b/src/mainboard/msi/ms7721/mptable.c @@ -21,7 +21,7 @@ #include <device/pci.h> #include <stdint.h> #include <string.h> -#include "southbridge/amd/agesa/hudson/hudson.h" +#include <southbridge/amd/agesa/hudson/hudson.h>
u8 picr_data[] = { diff --git a/src/mainboard/packardbell/ms2290/smihandler.c b/src/mainboard/packardbell/ms2290/smihandler.c index eeb55df..e94b61b 100644 --- a/src/mainboard/packardbell/ms2290/smihandler.c +++ b/src/mainboard/packardbell/ms2290/smihandler.c @@ -17,9 +17,9 @@ #include <arch/io.h> #include <console/console.h> #include <cpu/x86/smm.h> -#include "southbridge/intel/ibexpeak/nvs.h" -#include "southbridge/intel/ibexpeak/pch.h" -#include "southbridge/intel/ibexpeak/me.h" +#include <southbridge/intel/ibexpeak/nvs.h> +#include <southbridge/intel/ibexpeak/pch.h> +#include <southbridge/intel/ibexpeak/me.h> #include <northbridge/intel/nehalem/nehalem.h> #include <cpu/intel/model_2065x/model_2065x.h> #include <ec/acpi/ec.h> diff --git a/src/mainboard/pcengines/alix1c/irq_tables.c b/src/mainboard/pcengines/alix1c/irq_tables.c index 89ac717..aae9734 100644 --- a/src/mainboard/pcengines/alix1c/irq_tables.c +++ b/src/mainboard/pcengines/alix1c/irq_tables.c @@ -14,9 +14,8 @@ */
#include <arch/pirq_routing.h> -#include <console/console.h> #include <arch/io.h> -#include "southbridge/amd/cs5536/cs5536.h" +#include <southbridge/amd/cs5536/cs5536.h>
/* Platform IRQs */ #define PIRQA 11 diff --git a/src/mainboard/pcengines/alix2d/irq_tables.c b/src/mainboard/pcengines/alix2d/irq_tables.c index b90903f..5b3ae20 100644 --- a/src/mainboard/pcengines/alix2d/irq_tables.c +++ b/src/mainboard/pcengines/alix2d/irq_tables.c @@ -14,9 +14,8 @@ */
#include <arch/pirq_routing.h> -#include <console/console.h> #include <arch/io.h> -#include "southbridge/amd/cs5536/cs5536.h" +#include <southbridge/amd/cs5536/cs5536.h>
/* Platform IRQs */ #define PIRQA 11 diff --git a/src/mainboard/roda/rk9/acpi_tables.c b/src/mainboard/roda/rk9/acpi_tables.c index 1540d73..b673784 100644 --- a/src/mainboard/roda/rk9/acpi_tables.c +++ b/src/mainboard/roda/rk9/acpi_tables.c @@ -15,7 +15,6 @@ */
#include <string.h> -#include <console/console.h> #include <arch/io.h> #include <arch/ioapic.h> #include <arch/acpi.h> @@ -24,8 +23,8 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> +#include <southbridge/intel/i82801ix/nvs.h>
-#include "southbridge/intel/i82801ix/nvs.h" void acpi_create_gnvs(global_nvs_t *gnvs) { memset((void *)gnvs, 0, sizeof(*gnvs)); diff --git a/src/mainboard/samsung/lumpy/acpi_tables.c b/src/mainboard/samsung/lumpy/acpi_tables.c index 65922f3..06fa0fd 100644 --- a/src/mainboard/samsung/lumpy/acpi_tables.c +++ b/src/mainboard/samsung/lumpy/acpi_tables.c @@ -16,7 +16,6 @@ #include <types.h> #include <string.h> #include <cbmem.h> -#include <console/console.h> #include <arch/acpi.h> #include <arch/ioapic.h> #include <arch/acpigen.h> @@ -28,8 +27,8 @@ #if IS_ENABLED(CONFIG_CHROMEOS) #include <vendorcode/google/chromeos/gnvs.h> #endif +#include <southbridge/intel/bd82x6x/nvs.h>
-#include "southbridge/intel/bd82x6x/nvs.h" #include "thermal.h"
static global_nvs_t *gnvs_; diff --git a/src/mainboard/samsung/stumpy/acpi_tables.c b/src/mainboard/samsung/stumpy/acpi_tables.c index c5ecbea..a518d18 100644 --- a/src/mainboard/samsung/stumpy/acpi_tables.c +++ b/src/mainboard/samsung/stumpy/acpi_tables.c @@ -16,7 +16,6 @@ #include <types.h> #include <string.h> #include <cbmem.h> -#include <console/console.h> #include <arch/acpi.h> #include <arch/ioapic.h> #include <arch/acpigen.h> @@ -25,8 +24,8 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <vendorcode/google/chromeos/gnvs.h> +#include <southbridge/intel/bd82x6x/nvs.h>
-#include "southbridge/intel/bd82x6x/nvs.h" #include "thermal.h"
static global_nvs_t *gnvs_; diff --git a/src/mainboard/sapphire/pureplatinumh61/romstage.c b/src/mainboard/sapphire/pureplatinumh61/romstage.c index 420a956..85e6d3f 100644 --- a/src/mainboard/sapphire/pureplatinumh61/romstage.c +++ b/src/mainboard/sapphire/pureplatinumh61/romstage.c @@ -24,14 +24,12 @@ #include <device/pnp_def.h> #include <cpu/x86/lapic.h> #include <arch/acpi.h> -#include <console/console.h> -#include "northbridge/intel/sandybridge/sandybridge.h" -#include "northbridge/intel/sandybridge/raminit_native.h" +#include <northbridge/intel/sandybridge/sandybridge.h> +#include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/common/rcba.h> -#include "southbridge/intel/bd82x6x/pch.h" +#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/gpio.h> #include <arch/cpu.h> -#include <cpu/x86/msr.h> #include <delay.h>
void pch_enable_lpc(void)