[coreboot-gerrit] Change in coreboot[master]: soc/intel/common: Add SSDT generation for Intel USB4 PCIe ports

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has uploaded a new patch set (#11) to the change originally created by Duncan Laurie. ( https://review.coreboot.org/c/coreboot/+/44915 )

Change subject: soc/intel/common: Add SSDT generation for Intel USB4 PCIe ports
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soc/intel/common: Add SSDT generation for Intel USB4 PCIe ports

This driver will generate the ACPI _DSD for the USB4 PCIe root port
properties instead of using static ASL.

It assigns the USB4 port number and marks the port as external and
hotplug capable.

Change-Id: I7086b06346ce63fab6bef4077fb76ae1d30dc1eb
Signed-off-by: Duncan Laurie 
Signed-off-by: Tim Wawrzynczak 
---
M src/soc/intel/common/block/usb4/Kconfig
A src/soc/intel/common/block/usb4/chip.h
A src/soc/intel/common/block/usb4/pcie.c
M src/soc/intel/tigerlake/Kconfig
M src/soc/intel/tigerlake/acpi/tcss_dma.asl
M src/soc/intel/tigerlake/acpi/tcss_pcierp.asl
M src/soc/intel/tigerlake/chipset.cb
7 files changed, 138 insertions(+), 110 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/44915/11