Attention is currently required from: Jason Glenesk, Raul Rangel. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/50512
to look at the new patch set (#3).
Change subject: soc/amd: add and use fch_enable_hpet_decode ......................................................................
soc/amd: add and use fch_enable_hpet_decode
On Picasso we missed setting this bit in coreboot and since the default after reset is 0, we had to rely on the FSP to set this bit. Stoneyridge and Cezanne have the HPET decode enable bit in the same position in the same register. In the ACPI table entry written by southbridge_write_acpi_tables the HPET entry gets added, so we should make sure that we enable the decode.
TEST=HPET still works on Mandolin.
Change-Id: Ie98dae1d6036748f700f884d4b9653f2e59c24da Signed-off-by: Felix Held felix-coreboot@felixheld.de --- M src/soc/amd/common/block/acpimmio/mmio_util.c M src/soc/amd/common/block/include/amdblocks/acpimmio.h M src/soc/amd/common/block/smbus/sm.c 3 files changed, 13 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/50512/3